39 			 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04  in cx25840_set_audclk_freq()
40 			 * AUX_PLL Integer = 0x06, AUX PLL Post Divider = 0x10  in cx25840_set_audclk_freq()
61 			 * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider  in cx25840_set_audclk_freq()
77 			 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04  in cx25840_set_audclk_freq()
78 			 * AUX_PLL Integer = 0x09, AUX PLL Post Divider = 0x10  in cx25840_set_audclk_freq()
98 			 * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider  in cx25840_set_audclk_freq()
114 			 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04  in cx25840_set_audclk_freq()
115 			 * AUX_PLL Integer = 0x0a, AUX PLL Post Divider = 0x10  in cx25840_set_audclk_freq()
135 			 * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider  in cx25840_set_audclk_freq()
153 			 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04  in cx25840_set_audclk_freq()
154 			 * AUX_PLL Integer = 0x08, AUX PLL Post Divider = 0x1e  in cx25840_set_audclk_freq()
174 			 * SA_MCLK_DIV = 0x14 = 256/384 * AUX_PLL post dvivider  in cx25840_set_audclk_freq()
194 			 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04  in cx25840_set_audclk_freq()
195 			 * AUX_PLL Integer = 0x09, AUX PLL Post Divider = 0x18  in cx25840_set_audclk_freq()
215 			 * SA_MCLK_DIV = 0x10 = 256/384 * AUX_PLL post dvivider  in cx25840_set_audclk_freq()
235 			 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04  in cx25840_set_audclk_freq()
236 			 * AUX_PLL Integer = 0x0a, AUX PLL Post Divider = 0x18  in cx25840_set_audclk_freq()
256 			 * SA_MCLK_DIV = 0x10 = 256/384 * AUX_PLL post dvivider  in cx25840_set_audclk_freq()