Lines Matching refs:lgdt3305_write_reg

101 static int lgdt3305_write_reg(struct lgdt3305_state *state, u16 reg, u8 val)  in lgdt3305_write_reg()  function
175 ret = lgdt3305_write_reg(state, reg, val); in lgdt3305_set_reg_bit()
193 ret = lgdt3305_write_reg(state, regs[i].reg, regs[i].val); in lgdt3305_write_regs()
248 ret = lgdt3305_write_reg(state, LGDT3305_TP_CTRL_1, val); in lgdt3305_mpeg_mode_polarity()
284 ret = lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_1, opermode); in lgdt3305_set_modulation()
333 lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_1, agc_ref >> 8); in lgdt3305_passband_digital_agc()
334 lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_2, agc_ref & 0xff); in lgdt3305_passband_digital_agc()
369 lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_1, in lgdt3305_rfagc_loop()
371 lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_2, in lgdt3305_rfagc_loop()
374 lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_1, in lgdt3305_rfagc_loop()
376 lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_2, in lgdt3305_rfagc_loop()
382 lgdt3305_write_reg(state, LGDT3305_IFBW_1, ifbw >> 8); in lgdt3305_rfagc_loop()
383 lgdt3305_write_reg(state, LGDT3305_IFBW_2, ifbw & 0xff); in lgdt3305_rfagc_loop()
413 lgdt3305_write_reg(state, 0x0314, 0xe1 | lockdten << 1); in lgdt3305_agc_setup()
417 lgdt3305_write_reg(state, LGDT3305_AGC_CTRL_4, 0xe1 | lockdten << 1); in lgdt3305_agc_setup()
454 lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_1, in lgdt3305_set_agc_power_ref()
456 lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_2, in lgdt3305_set_agc_power_ref()
474 ret = lgdt3305_write_reg(state, LGDT3305_CR_CTRL_7, in lgdt3305_spectral_inversion()
479 ret = lgdt3305_write_reg(state, LGDT3305_FEC_BLOCK_CTRL, in lgdt3305_spectral_inversion()
529 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, nco1); in lgdt3305_set_if()
530 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, nco2); in lgdt3305_set_if()
531 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, nco3); in lgdt3305_set_if()
532 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, nco4); in lgdt3305_set_if()
577 lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_3, gen_ctrl_3); in lgdt3305_sleep()
578 lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_4, gen_ctrl_4); in lgdt3305_sleep()
701 lgdt3305_write_reg(state, 0x030d, 0x00); in lgdt3304_set_parameters()
702 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, 0x4f); in lgdt3304_set_parameters()
703 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, 0x0c); in lgdt3304_set_parameters()
704 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, 0xac); in lgdt3304_set_parameters()
705 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, 0xba); in lgdt3304_set_parameters()
709 lgdt3305_write_reg(state, 0x030d, 0x14); in lgdt3304_set_parameters()
769 ret = lgdt3305_write_reg(state, LGDT3305_GEN_CONTROL, 0x2f); in lgdt3305_set_parameters()
1131 ret = lgdt3305_write_reg(state, 0x0808, 0x80); in lgdt3305_attach()
1137 ret = lgdt3305_write_reg(state, 0x0808, 0x00); in lgdt3305_attach()