3  * IOMMU API for ARM architected SMMU implementations.
239 /* Maximum number of context banks per SMMU */
364 	struct arm_smmu_device		*smmu;  member
370 	struct mutex			init_mutex; /* Protects smmu pointer */
376 	struct arm_smmu_device		*smmu;  member
421 	u32 (*read_reg)(struct arm_smmu_device *smmu, int page, int offset);
422 	void (*write_reg)(struct arm_smmu_device *smmu, int page, int offset,
424 	u64 (*read_reg64)(struct arm_smmu_device *smmu, int page, int offset);
425 	void (*write_reg64)(struct arm_smmu_device *smmu, int page, int offset,
427 	int (*cfg_probe)(struct arm_smmu_device *smmu);
428 	int (*reset)(struct arm_smmu_device *smmu);
431 	void (*tlb_sync)(struct arm_smmu_device *smmu, int page, int sync,
437 				  struct arm_smmu_device *smmu,
460 static inline void __iomem *arm_smmu_page(struct arm_smmu_device *smmu, int n)  in arm_smmu_page()  argument
462 	return smmu->base + (n << smmu->pgshift);  in arm_smmu_page()
465 static inline u32 arm_smmu_readl(struct arm_smmu_device *smmu, int page, int offset)  in arm_smmu_readl()  argument
467 	if (smmu->impl && unlikely(smmu->impl->read_reg))  in arm_smmu_readl()
468 		return smmu->impl->read_reg(smmu, page, offset);  in arm_smmu_readl()
469 	return readl_relaxed(arm_smmu_page(smmu, page) + offset);  in arm_smmu_readl()
472 static inline void arm_smmu_writel(struct arm_smmu_device *smmu, int page,  in arm_smmu_writel()  argument
475 	if (smmu->impl && unlikely(smmu->impl->write_reg))  in arm_smmu_writel()
476 		smmu->impl->write_reg(smmu, page, offset, val);  in arm_smmu_writel()
478 		writel_relaxed(val, arm_smmu_page(smmu, page) + offset);  in arm_smmu_writel()
481 static inline u64 arm_smmu_readq(struct arm_smmu_device *smmu, int page, int offset)  in arm_smmu_readq()  argument
483 	if (smmu->impl && unlikely(smmu->impl->read_reg64))  in arm_smmu_readq()
484 		return smmu->impl->read_reg64(smmu, page, offset);  in arm_smmu_readq()
485 	return readq_relaxed(arm_smmu_page(smmu, page) + offset);  in arm_smmu_readq()
488 static inline void arm_smmu_writeq(struct arm_smmu_device *smmu, int page,  in arm_smmu_writeq()  argument
491 	if (smmu->impl && unlikely(smmu->impl->write_reg64))  in arm_smmu_writeq()
492 		smmu->impl->write_reg64(smmu, page, offset, val);  in arm_smmu_writeq()
494 		writeq_relaxed(val, arm_smmu_page(smmu, page) + offset);  in arm_smmu_writeq()
520 struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu);
521 struct arm_smmu_device *nvidia_smmu_impl_init(struct arm_smmu_device *smmu);
522 struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu);
524 void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx);
525 int arm_mmu500_reset(struct arm_smmu_device *smmu);