Lines Matching +full:smmu +full:- +full:v1
1 # SPDX-License-Identifier: GPL-2.0-only
2 # The IOVA library may also be used by non-IOMMU_API users
6 # The IOASID library may also be used by non-IOMMU_API users
39 sizes at both stage-1 and stage-2, as well as address spaces
40 up to 48-bits in size.
46 Enable self-tests for LPAE page table allocator. This performs
47 a series of page-table consistency checks during boot.
56 Enable support for the ARM Short-descriptor pagetable format.
57 This supports 32-bit virtual and physical addresses mapped using
58 2-level tables with 4KB pages/1MB sections, and contiguous entries
65 Enable self-tests for ARMv7s page table allocator. This performs
66 a series of page-table consistency checks during boot.
78 at initialization time, cause the IOMMU code to create a top-level
97 # IOMMU-agnostic DMA-mapping layer
140 Supports Interrupt remapping for IO-APIC and MSI devices.
195 bool "NVIDIA Tegra SMMU Support"
201 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
207 depends on !CPU_BIG_ENDIAN # revisit driver if we can enable big-endian ptes
213 non-linear physical memory chunks as linear memory in their
228 bool "Renesas VMSA-compatible IPMMU"
234 Support for the Renesas VMSA-compatible IPMMU found in the R-Mobile
235 APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
249 tristate "ARM Ltd. System MMU (SMMU) Support"
259 the ARM SMMU architecture.
262 bool "Support the legacy \"mmu-masters\" devicetree bindings"
265 Support for the badly designed and deprecated "mmu-masters"
267 to the SMMU but does not provide any support via the DMA API.
274 bool "Default to disabling bypass on ARM SMMU v1 and v2"
281 will not be allowed to pass through the SMMU.
295 'arm-smmu.disable_bypass' will continue to override this
385 bool "Hyper-V x2APIC IRQ Handling"
390 Stub IOMMU driver to handle IRQs as to allow Hyper-V Linux
400 Para-virtualised IOMMU driver with virtio.