Lines Matching +full:qcs404 +full:- +full:bimc
1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interconnect/qcom,qcs404.h>
9 #include <linux/interconnect-provider.h>
17 #include "smd-rpm.h"
107 * struct qcom_icc_provider - Qualcomm specific interconnect provider
121 * struct qcom_icc_node - Qualcomm specific interconnect nodes
159 DEFINE_QNODE(mas_apps_proc, QCS404_MASTER_AMPSS_M0, 8, 0, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNO…
160 DEFINE_QNODE(mas_oxili, QCS404_MASTER_GRAPHICS_3D, 8, -1, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNO…
161 DEFINE_QNODE(mas_mdp, QCS404_MASTER_MDP_PORT0, 8, -1, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SL…
162 DEFINE_QNODE(mas_snoc_bimc_1, QCS404_SNOC_BIMC_1_MAS, 8, 76, -1, QCS404_SLAVE_EBI_CH0);
163 DEFINE_QNODE(mas_tcu_0, QCS404_MASTER_TCU_0, 8, -1, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
164 DEFINE_QNODE(mas_spdm, QCS404_MASTER_SPDM, 4, -1, -1, QCS404_PNOC_INT_3);
165 DEFINE_QNODE(mas_blsp_1, QCS404_MASTER_BLSP_1, 4, 41, -1, QCS404_PNOC_INT_3);
166 DEFINE_QNODE(mas_blsp_2, QCS404_MASTER_BLSP_2, 4, 39, -1, QCS404_PNOC_INT_3);
167 DEFINE_QNODE(mas_xi_usb_hs1, QCS404_MASTER_XM_USB_HS1, 8, 138, -1, QCS404_PNOC_INT_0);
168 DEFINE_QNODE(mas_crypto, QCS404_MASTER_CRYPTO_CORE0, 8, 23, -1, QCS404_PNOC_SNOC_SLV, QCS404_PNOC_I…
169 DEFINE_QNODE(mas_sdcc_1, QCS404_MASTER_SDCC_1, 8, 33, -1, QCS404_PNOC_INT_0);
170 DEFINE_QNODE(mas_sdcc_2, QCS404_MASTER_SDCC_2, 8, 35, -1, QCS404_PNOC_INT_0);
171 DEFINE_QNODE(mas_snoc_pcnoc, QCS404_SNOC_PNOC_MAS, 8, 77, -1, QCS404_PNOC_INT_2);
172 DEFINE_QNODE(mas_qpic, QCS404_MASTER_QPIC, 4, -1, -1, QCS404_PNOC_INT_0);
173 DEFINE_QNODE(mas_qdss_bam, QCS404_MASTER_QDSS_BAM, 4, -1, -1, QCS404_SNOC_QDSS_INT);
174 DEFINE_QNODE(mas_bimc_snoc, QCS404_BIMC_SNOC_MAS, 8, 21, -1, QCS404_SLAVE_OCMEM_64, QCS404_SLAVE_CA…
175 DEFINE_QNODE(mas_pcnoc_snoc, QCS404_PNOC_SNOC_MAS, 8, 29, -1, QCS404_SNOC_BIMC_1_SLV, QCS404_SNOC_I…
176 DEFINE_QNODE(mas_qdss_etr, QCS404_MASTER_QDSS_ETR, 8, -1, -1, QCS404_SNOC_QDSS_INT);
177 DEFINE_QNODE(mas_emac, QCS404_MASTER_EMAC, 8, -1, -1, QCS404_SNOC_BIMC_1_SLV, QCS404_SNOC_INT_1);
178 DEFINE_QNODE(mas_pcie, QCS404_MASTER_PCIE, 8, -1, -1, QCS404_SNOC_BIMC_1_SLV, QCS404_SNOC_INT_1);
179 DEFINE_QNODE(mas_usb3, QCS404_MASTER_USB3, 8, -1, -1, QCS404_SNOC_BIMC_1_SLV, QCS404_SNOC_INT_1);
185 DEFINE_QNODE(pcnoc_s_2, QCS404_PNOC_SLV_2, 4, -1, -1, QCS404_SLAVE_GRAPHICS_3D_CFG);
192 DEFINE_QNODE(pcnoc_s_10, QCS404_PNOC_SLV_10, 4, 157, -1, QCS404_SLAVE_USB_HS);
194 DEFINE_QNODE(qdss_int, QCS404_SNOC_QDSS_INT, 8, -1, -1, QCS404_SNOC_BIMC_1_SLV, QCS404_SNOC_INT_1);
198 DEFINE_QNODE(slv_ebi, QCS404_SLAVE_EBI_CH0, 8, -1, 0, 0);
199 DEFINE_QNODE(slv_bimc_snoc, QCS404_BIMC_SNOC_SLV, 8, -1, 2, QCS404_BIMC_SNOC_MAS);
200 DEFINE_QNODE(slv_spdm, QCS404_SLAVE_SPDM_WRAPPER, 4, -1, -1, 0);
201 DEFINE_QNODE(slv_pdm, QCS404_SLAVE_PDM, 4, -1, 41, 0);
202 DEFINE_QNODE(slv_prng, QCS404_SLAVE_PRNG, 4, -1, 44, 0);
203 DEFINE_QNODE(slv_tcsr, QCS404_SLAVE_TCSR, 4, -1, 50, 0);
204 DEFINE_QNODE(slv_snoc_cfg, QCS404_SLAVE_SNOC_CFG, 4, -1, 70, 0);
205 DEFINE_QNODE(slv_message_ram, QCS404_SLAVE_MESSAGE_RAM, 4, -1, 55, 0);
206 DEFINE_QNODE(slv_disp_ss_cfg, QCS404_SLAVE_DISPLAY_CFG, 4, -1, -1, 0);
207 DEFINE_QNODE(slv_gpu_cfg, QCS404_SLAVE_GRAPHICS_3D_CFG, 4, -1, -1, 0);
208 DEFINE_QNODE(slv_blsp_1, QCS404_SLAVE_BLSP_1, 4, -1, 39, 0);
209 DEFINE_QNODE(slv_tlmm_north, QCS404_SLAVE_TLMM_NORTH, 4, -1, 214, 0);
210 DEFINE_QNODE(slv_pcie, QCS404_SLAVE_PCIE_1, 4, -1, -1, 0);
211 DEFINE_QNODE(slv_ethernet, QCS404_SLAVE_EMAC_CFG, 4, -1, -1, 0);
212 DEFINE_QNODE(slv_blsp_2, QCS404_SLAVE_BLSP_2, 4, -1, 37, 0);
213 DEFINE_QNODE(slv_tlmm_east, QCS404_SLAVE_TLMM_EAST, 4, -1, 213, 0);
214 DEFINE_QNODE(slv_tcu, QCS404_SLAVE_TCU, 8, -1, -1, 0);
215 DEFINE_QNODE(slv_pmic_arb, QCS404_SLAVE_PMIC_ARB, 4, -1, 59, 0);
216 DEFINE_QNODE(slv_sdcc_1, QCS404_SLAVE_SDCC_1, 4, -1, 31, 0);
217 DEFINE_QNODE(slv_sdcc_2, QCS404_SLAVE_SDCC_2, 4, -1, 33, 0);
218 DEFINE_QNODE(slv_tlmm_south, QCS404_SLAVE_TLMM_SOUTH, 4, -1, -1, 0);
219 DEFINE_QNODE(slv_usb_hs, QCS404_SLAVE_USB_HS, 4, -1, 40, 0);
220 DEFINE_QNODE(slv_usb3, QCS404_SLAVE_USB3, 4, -1, 22, 0);
221 DEFINE_QNODE(slv_crypto_0_cfg, QCS404_SLAVE_CRYPTO_0_CFG, 4, -1, 52, 0);
222 DEFINE_QNODE(slv_pcnoc_snoc, QCS404_PNOC_SNOC_SLV, 8, -1, 45, QCS404_PNOC_SNOC_MAS);
223 DEFINE_QNODE(slv_kpss_ahb, QCS404_SLAVE_APPSS, 4, -1, -1, 0);
224 DEFINE_QNODE(slv_wcss, QCS404_SLAVE_WCSS, 4, -1, 23, 0);
225 DEFINE_QNODE(slv_snoc_bimc_1, QCS404_SNOC_BIMC_1_SLV, 8, -1, 104, QCS404_SNOC_BIMC_1_MAS);
226 DEFINE_QNODE(slv_imem, QCS404_SLAVE_OCIMEM, 8, -1, 26, 0);
227 DEFINE_QNODE(slv_snoc_pcnoc, QCS404_SNOC_PNOC_SLV, 8, -1, 28, QCS404_SNOC_PNOC_MAS);
228 DEFINE_QNODE(slv_qdss_stm, QCS404_SLAVE_QDSS_STM, 4, -1, 30, 0);
229 DEFINE_QNODE(slv_cats_0, QCS404_SLAVE_CATS_128, 16, -1, -1, 0);
230 DEFINE_QNODE(slv_cats_1, QCS404_SLAVE_OCMEM_64, 8, -1, -1, 0);
231 DEFINE_QNODE(slv_lpass, QCS404_SLAVE_LPASS, 4, -1, -1, 0);
343 qn = src->data; in qcom_icc_set()
344 provider = src->provider; in qcom_icc_set()
347 list_for_each_entry(n, &provider->nodes, node_list) in qcom_icc_set()
348 provider->aggregate(n, 0, n->avg_bw, n->peak_bw, in qcom_icc_set()
355 if (qn->mas_rpm_id != -1) { in qcom_icc_set()
358 qn->mas_rpm_id, in qcom_icc_set()
362 qn->mas_rpm_id, ret); in qcom_icc_set()
367 if (qn->slv_rpm_id != -1) { in qcom_icc_set()
370 qn->slv_rpm_id, in qcom_icc_set()
381 do_div(rate, qn->buswidth); in qcom_icc_set()
383 if (qn->rate == rate) in qcom_icc_set()
386 for (i = 0; i < qp->num_clks; i++) { in qcom_icc_set()
387 ret = clk_set_rate(qp->bus_clks[i].clk, rate); in qcom_icc_set()
390 qp->bus_clks[i].id, ret); in qcom_icc_set()
395 qn->rate = rate; in qcom_icc_set()
402 struct device *dev = &pdev->dev; in qnoc_probe()
414 return -EPROBE_DEFER; in qnoc_probe()
418 return -EINVAL; in qnoc_probe()
420 qnodes = desc->nodes; in qnoc_probe()
421 num_nodes = desc->num_nodes; in qnoc_probe()
425 return -ENOMEM; in qnoc_probe()
430 return -ENOMEM; in qnoc_probe()
432 qp->bus_clks = devm_kmemdup(dev, bus_clocks, sizeof(bus_clocks), in qnoc_probe()
434 if (!qp->bus_clks) in qnoc_probe()
435 return -ENOMEM; in qnoc_probe()
437 qp->num_clks = ARRAY_SIZE(bus_clocks); in qnoc_probe()
438 ret = devm_clk_bulk_get(dev, qp->num_clks, qp->bus_clks); in qnoc_probe()
442 ret = clk_bulk_prepare_enable(qp->num_clks, qp->bus_clks); in qnoc_probe()
446 provider = &qp->provider; in qnoc_probe()
447 INIT_LIST_HEAD(&provider->nodes); in qnoc_probe()
448 provider->dev = dev; in qnoc_probe()
449 provider->set = qcom_icc_set; in qnoc_probe()
450 provider->aggregate = icc_std_aggregate; in qnoc_probe()
451 provider->xlate = of_icc_xlate_onecell; in qnoc_probe()
452 provider->data = data; in qnoc_probe()
457 clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); in qnoc_probe()
464 node = icc_node_create(qnodes[i]->id); in qnoc_probe()
470 node->name = qnodes[i]->name; in qnoc_probe()
471 node->data = qnodes[i]; in qnoc_probe()
474 dev_dbg(dev, "registered node %s\n", node->name); in qnoc_probe()
477 for (j = 0; j < qnodes[i]->num_links; j++) in qnoc_probe()
478 icc_link_create(node, qnodes[i]->links[j]); in qnoc_probe()
480 data->nodes[i] = node; in qnoc_probe()
482 data->num_nodes = num_nodes; in qnoc_probe()
489 clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); in qnoc_probe()
499 icc_nodes_remove(&qp->provider); in qnoc_remove()
500 clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); in qnoc_remove()
501 return icc_provider_del(&qp->provider); in qnoc_remove()
505 { .compatible = "qcom,qcs404-bimc", .data = &qcs404_bimc },
506 { .compatible = "qcom,qcs404-pcnoc", .data = &qcs404_pcnoc },
507 { .compatible = "qcom,qcs404-snoc", .data = &qcs404_snoc },
516 .name = "qnoc-qcs404",
521 MODULE_DESCRIPTION("Qualcomm QCS404 NoC driver");