758 static inline void qib_write_kreg(const struct qib_devdata *dd,
859 static inline void qib_write_kreg(const struct qib_devdata *dd,  in qib_write_kreg()  function
897 	qib_write_kreg(dd, regno + ctxt, value);  in qib_write_kreg_ctxt()
1357 			qib_write_kreg(dd, kr_sendbuffererror + i, sbuf[i]);  in qib_disarm_7322_senderrbufs()
1499 		qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_sdma_sendctrl()
1511 	qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_sdma_sendctrl()
1516 		qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_sdma_sendctrl()
1684 	qib_write_kreg(dd, kr_errclear, errs);  in handle_7322_errors()
1741 	qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);  in qib_error_tasklet()
2018 		qib_write_kreg(dd, kr_intmask, dd->cspec->int_enable_mask);  in qib_7322_set_intr_state()
2020 		qib_write_kreg(dd, kr_intclear, 0ULL);  in qib_7322_set_intr_state()
2026 				qib_write_kreg(dd, kr_intgranted, val);  in qib_7322_set_intr_state()
2029 		qib_write_kreg(dd, kr_intmask, 0ULL);  in qib_7322_set_intr_state()
2052 	qib_write_kreg(dd, kr_errmask, 0ULL);  in qib_7322_clear_freeze()
2063 	qib_write_kreg(dd, kr_control, dd->control);  in qib_7322_clear_freeze()
2072 	qib_write_kreg(dd, kr_hwerrclear, 0ULL);  in qib_7322_clear_freeze()
2073 	qib_write_kreg(dd, kr_errclear, E_SPKT_ERRS_IGNORE);  in qib_7322_clear_freeze()
2074 	qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);  in qib_7322_clear_freeze()
2115 	qib_write_kreg(dd, kr_hwerrclear, hwerrs &  in qib_7322_handle_hwerrors()
2154 		qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);  in qib_7322_handle_hwerrors()
2224 	qib_write_kreg(dd, kr_hwerrclear, ~HWE_MASK(PowerOnBISTFailed));  in qib_7322_init_hwerrors()
2225 	qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);  in qib_7322_init_hwerrors()
2228 	qib_write_kreg(dd, kr_errclear, ~0ULL);  in qib_7322_init_hwerrors()
2230 	qib_write_kreg(dd, kr_errmask, ~0ULL);  in qib_7322_init_hwerrors()
2247 		qib_write_kreg(dd, kr_errclear, QIB_E_SPIOARMLAUNCH);  in qib_set_7322_armlaunch()
2251 	qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);  in qib_set_7322_armlaunch()
2301 	qib_write_kreg(dd, kr_scratch, 0);  in qib_set_ib_7322_lstate()
2347 	qib_write_kreg(dd, kr_scratch, 0ULL);  in set_vls()
2360 	qib_write_kreg(dd, kr_scratch, 0ULL);  in set_vls()
2387 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_bringup_serdes()
2486 	qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_bringup_serdes()
2496 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_bringup_serdes()
2560 		qib_write_kreg(dd, kr_hwdiagctrl,  in qib_7322_mini_quiet_serdes()
2588 		qib_write_kreg(dd, kr_hwdiagctrl, diagc);  in qib_7322_mini_quiet_serdes()
2658 	qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);  in qib_setup_7322_setextled()
2684 			qib_write_kreg(dd, KREG_IDX(DCACtrlA),  in qib_7322_notify_dca()
2710 		qib_write_kreg(dd, rmp->regno,  in qib_update_rhdrq_dca()
2713 		qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);  in qib_update_rhdrq_dca()
2738 		qib_write_kreg(dd, KREG_IDX(DCACtrlF),  in qib_update_sdma_dca()
2743 		qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);  in qib_update_sdma_dca()
2780 		qib_write_kreg(dd, KREG_IDX(DCACtrlB) + i,  in qib_setup_dca()
2857 		qib_write_kreg(dd, kr_intgranted, intgranted);  in qib_7322_free_irq()
2869 		qib_write_kreg(dd, KREG_IDX(DCACtrlA), dd->cspec->dca_ctrl);  in qib_setup_7322_cleanup()
2888 			qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);  in qib_setup_7322_cleanup()
2927 	qib_write_kreg(dd, kr_sendctrl, dd->sendctrl);  in qib_wantpiobuf_7322_intr()
2928 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_wantpiobuf_7322_intr()
2946 	qib_write_kreg(dd, kr_intmask, (dd->cspec->int_enable_mask & ~kills));  in unknown_7322_ibits()
2971 	qib_write_kreg(dd, kr_gpio_clear, gpiostatus);  in unknown_7322_gpio_intr()
3010 		qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);  in unknown_7322_gpio_intr()
3025 		qib_write_kreg(dd, kr_errmask, 0ULL);  in unlikely_7322_intr()
3055 	qib_write_kreg(dd, kr_rcvavailtimeout + rcd->ctxt, timeout);  in adjust_rcv_timeout()
3118 	qib_write_kreg(dd, kr_intclear, istat);  in qib_7322intr()
3176 	qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) |  in qib_7322pintr()
3203 	qib_write_kreg(dd, kr_intclear, QIB_I_SPIOBUFAVAIL);  in qib_7322bufavail()
3234 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_intr()
3261 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_idle_intr()
3288 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_progress_intr()
3316 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_cleanup_intr()
3400 		qib_write_kreg(dd, kr_intclear, ~0ULL);  in qib_setup_7322_interrupt()
3403 		qib_write_kreg(dd, kr_intgranted, ~0ULL);  in qib_setup_7322_interrupt()
3404 		qib_write_kreg(dd, kr_vecclr_wo_int, ~0ULL);  in qib_setup_7322_interrupt()
3538 		qib_write_kreg(dd, kr_intredirect + i, redirect[i]);  in qib_setup_7322_interrupt()
3723 			qib_write_kreg(dd, 2 * i +  in qib_do_7322_reset()
3726 			qib_write_kreg(dd, 1 + 2 * i +  in qib_do_7322_reset()
3949 	qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl);  in qib_7322_config_ctxts()
4151 			qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4165 			qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4185 		qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4202 		qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4314 	qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_set_ib_cfg()
4349 		qib_write_kreg(ppd->dd, kr_scratch, 0);  in qib_7322_set_loopback()
4390 		qib_write_kreg(dd, kr_scratch, 0);  in set_vl_weights()
4539 		qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl);  in rcvctrl_7322_mod()
4655 			qib_write_kreg(dd, kr_sendctrl,  in sendctrl_7322_mod()
4658 			qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4674 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4688 		qib_write_kreg(dd, kr_sendctrl, tmp_dd_sendctrl);  in sendctrl_7322_mod()
4689 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4694 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4698 		qib_write_kreg(dd, kr_sendctrl, dd->sendctrl);  in sendctrl_7322_mod()
4699 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4713 		qib_write_kreg(dd, kr_scratch, v);  in sendctrl_7322_mod()
4715 		qib_write_kreg(dd, kr_scratch, v);  in sendctrl_7322_mod()
5192 	qib_write_kreg(dd, kr_hwerrmask,  in qib_7322_mini_pcs_reset()
5202 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_mini_pcs_reset()
5203 	qib_write_kreg(dd, kr_hwerrclear,  in qib_7322_mini_pcs_reset()
5205 	qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);  in qib_7322_mini_pcs_reset()
5336 	qib_write_kreg(ppd->dd, kr_scratch, 0);  in set_7322_ibspeed_fast()
5708 		qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);  in gpio_7322_mod()
5709 		qib_write_kreg(dd, kr_gpio_out, new_out);  in gpio_7322_mod()
5909 		qib_write_kreg(dd, idx, tval);  in sendctrl_hook()
5910 		qib_write_kreg(dd, kr_scratch, 0Ull);  in sendctrl_hook()
6029 	qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);  in qib_init_7322_qsfp()
6030 	qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);  in qib_init_7322_qsfp()
6170 	qib_write_kreg(dd, kr_rcvhdrentsize, dd->rcvhdrentsize);  in qib_late_7322_initreg()
6171 	qib_write_kreg(dd, kr_rcvhdrsize, dd->rcvhdrsize);  in qib_late_7322_initreg()
6172 	qib_write_kreg(dd, kr_rcvhdrcnt, dd->rcvhdrcnt);  in qib_late_7322_initreg()
6173 	qib_write_kreg(dd, kr_sendpioavailaddr, dd->pioavailregs_phys);  in qib_late_7322_initreg()
6192 	qib_write_kreg(dd, kr_control, dd->control);  in qib_late_7322_initreg()
6210 	qib_write_kreg(dd, kr_control, dd->control);  in qib_late_7322_initreg()
6239 		qib_write_kreg(ppd->dd, kr_scratch, 0);  in write_7322_init_portregs()
6288 	qib_write_kreg(dd, KREG_IDX(RcvQPMulticastContext_1), 1);  in write_7322_initregs()
6340 		qib_write_kreg(dd, kr_rcvavailtimeout + i, rcv_int_timeout);  in write_7322_initregs()
7146 		qib_write_kreg(dd, kr_sendcheckmask + i,  in qib_7322_txchk_change()
7150 		qib_write_kreg(dd, kr_sendgrhcheckmask + i,  in qib_7322_txchk_change()
7152 		qib_write_kreg(dd, kr_sendibpktmask + i,  in qib_7322_txchk_change()
7167 	qib_write_kreg(dd, kr_scratch, val);  in writescratch()
7306 	qib_write_kreg(dd, kr_hwdiagctrl, 0);  in qib_init_iba7322_funcs()
7364 	qib_write_kreg(dd, regidx, pack_ent);  in set_txdds()
7366 	qib_write_kreg(ppd->dd, kr_scratch, 0);  in set_txdds()
7745 	qib_write_kreg(dd, KR_AHB_ACC, acc);  in ahb_mod()
7764 		qib_write_kreg(dd, KR_AHB_TRANS, trans);  in ahb_mod()
7787 		qib_write_kreg(dd, KR_AHB_TRANS, trans);  in ahb_mod()
7802 	qib_write_kreg(dd, KR_AHB_ACC, prev_acc);  in ahb_mod()
8258 	qib_write_kreg(dd, kr_r_access, val);  in qib_r_grab()
8301 		qib_write_kreg(dd, kr_r_access, val);  in qib_r_shift()
8309 	qib_write_kreg(dd, kr_r_access, val);  in qib_r_shift()
8327 		qib_write_kreg(dd, kr_r_access, val);  in qib_r_update()
8469 	qib_write_kreg(dd, kr_control, dd->control |  in check_7322_rxe_status()
8482 		qib_write_kreg(dd, kr_fmask, 0ULL);  in check_7322_rxe_status()
8487 	qib_write_kreg(ppd->dd, kr_hwerrclear,  in check_7322_rxe_status()
8491 	qib_write_kreg(dd, kr_control, dd->control);  in check_7322_rxe_status()