359 static inline u64 qib_read_kreg64(const struct qib_devdata *dd,  in qib_read_kreg64()  function
753 	hwerrs = qib_read_kreg64(dd, kr_hwerrstatus);  in qib_handle_6120_hwerrors()
971 	sbuf[0] = qib_read_kreg64(dd, kr_sendbuffererror);  in qib_disarm_6120_senderrbufs()
972 	sbuf[1] = qib_read_kreg64(dd, kr_sendbuffererror + 1);  in qib_disarm_6120_senderrbufs()
1065 		u64 ibcs = qib_read_kreg64(dd, kr_ibcstatus);  in handle_6120_errors()
1133 	extsval = qib_read_kreg64(dd, kr_extstatus);  in qib_6120_init_hwerrors()
1159 	dd->cspec->errormask = qib_read_kreg64(dd, kr_errmask);  in qib_6120_init_hwerrors()
1268 	val = qib_read_kreg64(dd, kr_serdes_cfg0);  in qib_6120_bringup_serdes()
1269 	config1 = qib_read_kreg64(dd, kr_serdes_cfg1);  in qib_6120_bringup_serdes()
1285 	qib_read_kreg64(dd, kr_scratch);  in qib_6120_bringup_serdes()
1305 	(void) qib_read_kreg64(dd, kr_scratch);  in qib_6120_bringup_serdes()
1317 	(void) qib_read_kreg64(dd, kr_scratch);  in qib_6120_bringup_serdes()
1319 	val = qib_read_kreg64(dd, kr_xgxs_cfg);  in qib_6120_bringup_serdes()
1331 	val = qib_read_kreg64(dd, kr_serdes_cfg0);  in qib_6120_bringup_serdes()
1349 	hwstat = qib_read_kreg64(dd, kr_hwerrstatus);  in qib_6120_bringup_serdes()
1385 		diagc = qib_read_kreg64(dd, kr_hwdiagctrl);  in qib_6120_quiet_serdes()
1408 	val = qib_read_kreg64(dd, kr_serdes_cfg0);  in qib_6120_quiet_serdes()
1455 		val = qib_read_kreg64(dd, kr_ibcstatus);  in qib_6120_setup_setextled()
1526 		estat = qib_read_kreg64(dd, kr_errstatus);  in unlikely_6120_intr()
2586 	errormask = qib_read_kreg64(dd, kr_errmask);  in qib_chk_6120_errormask()
2592 	hwerrs = qib_read_kreg64(dd, kr_hwerrstatus);  in qib_chk_6120_errormask()
2668 	prev_val = qib_read_kreg64(dd, kr_xgxs_cfg);  in qib_6120_xgxs_reset()
3064 	read_val = qib_read_kreg64(dd, kr_extstatus);  in gpio_6120_mod()
3085 	dd->piobufbase = qib_read_kreg64(dd, kr_sendpiobufbase);  in get_6120_chip_params()
3090 	val = qib_read_kreg64(dd, kr_sendpiosize);  in get_6120_chip_params()
3099 	val = qib_read_kreg64(dd, kr_sendpiobufcnt);  in get_6120_chip_params()
3155 	val = qib_read_kreg64(dd, kr_sendpioavailaddr);  in qib_late_6120_initreg()
3308 	qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */  in get_6120_link_buf()
3316 	qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */  in get_6120_link_buf()
3517 	if (qib_read_kreg64(dd, kr_hwerrstatus) &  in qib_init_iba6120_funcs()