85 		dd_dev_err(dd, "pci enable failed: error %d\n", -ret);  in hfi1_pcie_init()
91 		dd_dev_err(dd, "pci_request_regions fails: err %d\n", -ret);  in hfi1_pcie_init()
104 			dd_dev_err(dd, "Unable to set DMA mask: %d\n", ret);  in hfi1_pcie_init()
112 		dd_dev_err(dd, "Unable to set DMA consistent mask: %d\n", ret);  in hfi1_pcie_init()
160 		dd_dev_err(dd, "chip PIO range does not match\n");  in hfi1_pcie_ddinit()
166 		dd_dev_err(dd, "UC mapping of kregbase1 failed\n");  in hfi1_pcie_ddinit()
174 		dd_dev_err(dd, "Cannot read chip CSRs\n");  in hfi1_pcie_ddinit()
186 		dd_dev_err(dd, "UC mapping of kregbase2 failed\n");  in hfi1_pcie_ddinit()
194 		dd_dev_err(dd, "WC mapping of send buffers failed\n");  in hfi1_pcie_ddinit()
208 		dd_dev_err(dd, "WC mapping of receive array failed\n");  in hfi1_pcie_ddinit()
278 		dd_dev_err(dd, "Unable to read from PCI config\n");  in update_lbus_info()
299 		dd_dev_err(dd, "Can't find PCI Express capability!\n");  in pcie_speeds()
308 		dd_dev_err(dd, "Unable to read from PCI config\n");  in pcie_speeds()
392 	dd_dev_err(dd, "Unable to write to PCI config\n");  in restore_pci_variables()
451 	dd_dev_err(dd, "Unable to read from PCI config\n");  in save_pci_variables()
797 			dd_dev_err(dd, "Unable to read from PCI config\n");  in load_eq_table()
805 				dd_dev_err(dd,  in load_eq_table()
807 				dd_dev_err(dd, "         prec   attn   post\n");  in load_eq_table()
809 			dd_dev_err(dd, "   p%02d:   %02x     %02x     %02x\n",  in load_eq_table()
812 			dd_dev_err(dd, "            %02x     %02x     %02x\n",  in load_eq_table()
860 		dd_dev_err(dd, "%s: no parent device\n", __func__);  in trigger_sbr()
867 			dd_dev_err(dd,  in trigger_sbr()
1062 		dd_dev_err(dd, "The PCIe link is not Gen3 capable\n");  in do_pcie_gen3_transition()
1070 		dd_dev_err(dd, "%s: unable to acquire SBus resource\n",  in do_pcie_gen3_transition()
1177 		dd_dev_err(dd, "%s: Invalid Eq Pset %u, setting to %d\n",  in do_pcie_gen3_transition()
1257 		dd_dev_err(dd, "Unable to read from PCI config\n");  in do_pcie_gen3_transition()
1273 			dd_dev_err(dd, "Unable to write to PCI config\n");  in do_pcie_gen3_transition()
1284 		dd_dev_err(dd, "Unable to read from PCI config\n");  in do_pcie_gen3_transition()
1297 		dd_dev_err(dd, "Unable to write to PCI config\n");  in do_pcie_gen3_transition()
1352 		dd_dev_err(dd, "%s: Could not restore PCI variables\n",  in do_pcie_gen3_transition()
1374 		dd_dev_err(dd, "SBR failed - unable to read from device\n");  in do_pcie_gen3_transition()
1389 		dd_dev_err(dd, "Unable to read from PCI config\n");  in do_pcie_gen3_transition()
1400 		dd_dev_err(dd,  in do_pcie_gen3_transition()
1411 		dd_dev_err(dd, "%s: gasket error %d\n", __func__, err);  in do_pcie_gen3_transition()
1425 		dd_dev_err(dd, "PCIe link speed or width did not match target%s\n",  in do_pcie_gen3_transition()
1446 		dd_dev_err(dd, "Proceeding at current speed PCIe speed\n");  in do_pcie_gen3_transition()