Lines Matching +full:clock +full:- +full:presc
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
8 * Inspired from: fsl-imx25-tsadc
25 #include "stm32-adc-core.h"
41 * struct stm32_adc_common_regs - stm32 common registers
61 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data
63 * @clk_sel: clock selection routine
64 * @max_clk_rate_hz: maximum analog clock rate (Hz, from datasheet)
77 * struct stm32_adc_priv - stm32 ADC core private data
80 * @aclk: clock reference for the analog circuitry
81 * @bclk: bus clock common for all ADCs, depends on part used
82 * @max_clk_rate: desired maximum clock rate
117 /* STM32F4 ADC internal common clock prescaler division ratios */
121 * stm32f4_adc_clk_sel() - Select stm32f4 ADC common clock prescaler
124 * Select clock prescaler used for analog conversions, before using ADC.
134 if (!priv->aclk) { in stm32f4_adc_clk_sel()
135 dev_err(&pdev->dev, "No 'adc' clock found\n"); in stm32f4_adc_clk_sel()
136 return -ENOENT; in stm32f4_adc_clk_sel()
139 rate = clk_get_rate(priv->aclk); in stm32f4_adc_clk_sel()
141 dev_err(&pdev->dev, "Invalid clock rate: 0\n"); in stm32f4_adc_clk_sel()
142 return -EINVAL; in stm32f4_adc_clk_sel()
146 if ((rate / stm32f4_pclk_div[i]) <= priv->max_clk_rate) in stm32f4_adc_clk_sel()
150 dev_err(&pdev->dev, "adc clk selection failed\n"); in stm32f4_adc_clk_sel()
151 return -EINVAL; in stm32f4_adc_clk_sel()
154 priv->common.rate = rate / stm32f4_pclk_div[i]; in stm32f4_adc_clk_sel()
155 val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR); in stm32f4_adc_clk_sel()
158 writel_relaxed(val, priv->common.base + STM32F4_ADC_CCR); in stm32f4_adc_clk_sel()
160 dev_dbg(&pdev->dev, "Using analog clock source at %ld kHz\n", in stm32f4_adc_clk_sel()
161 priv->common.rate / 1000); in stm32f4_adc_clk_sel()
167 * struct stm32h7_adc_ck_spec - specification for stm32h7 adc clock
168 * @ckmode: ADC clock mode, Async or sync with prescaler.
169 * @presc: prescaler bitfield for async clock mode
174 u32 presc; member
179 /* 00: CK_ADC[1..3]: Asynchronous clock modes */
192 /* HCLK used: Synchronous clock modes (1, 2 or 4 prescaler) */
201 u32 ckmode, presc, val; in stm32h7_adc_clk_sel() local
205 /* stm32h7 bus clock is common for all ADC instances (mandatory) */ in stm32h7_adc_clk_sel()
206 if (!priv->bclk) { in stm32h7_adc_clk_sel()
207 dev_err(&pdev->dev, "No 'bus' clock found\n"); in stm32h7_adc_clk_sel()
208 return -ENOENT; in stm32h7_adc_clk_sel()
212 * stm32h7 can use either 'bus' or 'adc' clock for analog circuitry. in stm32h7_adc_clk_sel()
213 * So, choice is to have bus clock mandatory and adc clock optional. in stm32h7_adc_clk_sel()
214 * If optional 'adc' clock has been found, then try to use it first. in stm32h7_adc_clk_sel()
216 if (priv->aclk) { in stm32h7_adc_clk_sel()
218 * Asynchronous clock modes (e.g. ckmode == 0) in stm32h7_adc_clk_sel()
221 rate = clk_get_rate(priv->aclk); in stm32h7_adc_clk_sel()
223 dev_err(&pdev->dev, "Invalid adc clock rate: 0\n"); in stm32h7_adc_clk_sel()
224 return -EINVAL; in stm32h7_adc_clk_sel()
229 presc = stm32h7_adc_ckmodes_spec[i].presc; in stm32h7_adc_clk_sel()
235 if ((rate / div) <= priv->max_clk_rate) in stm32h7_adc_clk_sel()
240 /* Synchronous clock modes (e.g. ckmode is 1, 2 or 3) */ in stm32h7_adc_clk_sel()
241 rate = clk_get_rate(priv->bclk); in stm32h7_adc_clk_sel()
243 dev_err(&pdev->dev, "Invalid bus clock rate: 0\n"); in stm32h7_adc_clk_sel()
244 return -EINVAL; in stm32h7_adc_clk_sel()
249 presc = stm32h7_adc_ckmodes_spec[i].presc; in stm32h7_adc_clk_sel()
255 if ((rate / div) <= priv->max_clk_rate) in stm32h7_adc_clk_sel()
259 dev_err(&pdev->dev, "adc clk selection failed\n"); in stm32h7_adc_clk_sel()
260 return -EINVAL; in stm32h7_adc_clk_sel()
264 priv->common.rate = rate / div; in stm32h7_adc_clk_sel()
266 /* Set common clock mode and prescaler */ in stm32h7_adc_clk_sel()
267 val = readl_relaxed(priv->common.base + STM32H7_ADC_CCR); in stm32h7_adc_clk_sel()
270 val |= presc << STM32H7_PRESC_SHIFT; in stm32h7_adc_clk_sel()
271 writel_relaxed(val, priv->common.base + STM32H7_ADC_CCR); in stm32h7_adc_clk_sel()
273 dev_dbg(&pdev->dev, "Using %s clock/%d source at %ld kHz\n", in stm32h7_adc_clk_sel()
274 ckmode ? "bus" : "adc", div, priv->common.rate / 1000); in stm32h7_adc_clk_sel()
308 ier = readl_relaxed(priv->common.base + offset + priv->cfg->regs->ier); in stm32_adc_eoc_enabled()
310 return ier & priv->cfg->regs->eocie_msk; in stm32_adc_eoc_enabled()
322 status = readl_relaxed(priv->common.base + priv->cfg->regs->csr); in stm32_adc_irq_handler()
328 * - an ADC configured to use DMA (EOC triggers the DMA request, and in stm32_adc_irq_handler()
330 * - an ADC configured to use IRQs (EOCIE bit is set. The handler must in stm32_adc_irq_handler()
334 * IRQ-enabled ADCs). in stm32_adc_irq_handler()
336 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_handler()
337 if ((status & priv->cfg->regs->eoc_msk[i] && in stm32_adc_irq_handler()
339 (status & priv->cfg->regs->ovr_msk[i])) in stm32_adc_irq_handler()
340 generic_handle_irq(irq_find_mapping(priv->domain, i)); in stm32_adc_irq_handler()
349 irq_set_chip_data(irq, d->host_data); in stm32_adc_domain_map()
370 struct device_node *np = pdev->dev.of_node; in stm32_adc_irq_probe()
375 * - stm32f4/h7 shares a common interrupt line. in stm32_adc_irq_probe()
376 * - stm32mp1, has one line per ADC in stm32_adc_irq_probe()
378 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_probe()
379 priv->irq[i] = platform_get_irq(pdev, i); in stm32_adc_irq_probe()
380 if (priv->irq[i] < 0) in stm32_adc_irq_probe()
381 return priv->irq[i]; in stm32_adc_irq_probe()
384 priv->domain = irq_domain_add_simple(np, STM32_ADC_MAX_ADCS, 0, in stm32_adc_irq_probe()
387 if (!priv->domain) { in stm32_adc_irq_probe()
388 dev_err(&pdev->dev, "Failed to add irq domain\n"); in stm32_adc_irq_probe()
389 return -ENOMEM; in stm32_adc_irq_probe()
392 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_probe()
393 irq_set_chained_handler(priv->irq[i], stm32_adc_irq_handler); in stm32_adc_irq_probe()
394 irq_set_handler_data(priv->irq[i], priv); in stm32_adc_irq_probe()
407 irq_dispose_mapping(irq_find_mapping(priv->domain, hwirq)); in stm32_adc_irq_remove()
408 irq_domain_remove(priv->domain); in stm32_adc_irq_remove()
410 for (i = 0; i < priv->cfg->num_irqs; i++) in stm32_adc_irq_remove()
411 irq_set_chained_handler(priv->irq[i], NULL); in stm32_adc_irq_remove()
423 * - Voltage booster can be used, to get full ADC performances in stm32_adc_core_switches_supply_en()
425 * - Vdd can be used to supply them, if above 2.7V (STM32MP1 only). in stm32_adc_core_switches_supply_en()
428 * - vdda < 2.7V but vdd > 2.7V: ANASWVDD = 1, EN_BOOSTER = 0 (stm32mp1) in stm32_adc_core_switches_supply_en()
429 * - vdda < 2.7V and vdd < 2.7V: ANASWVDD = 0, EN_BOOSTER = 1 in stm32_adc_core_switches_supply_en()
430 * - vdda >= 2.7V: ANASWVDD = 0, EN_BOOSTER = 0 (default) in stm32_adc_core_switches_supply_en()
432 if (priv->vdda_uv < 2700000) { in stm32_adc_core_switches_supply_en()
433 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_en()
434 ret = regulator_enable(priv->vdd); in stm32_adc_core_switches_supply_en()
440 ret = regmap_write(priv->syscfg, in stm32_adc_core_switches_supply_en()
444 regulator_disable(priv->vdd); in stm32_adc_core_switches_supply_en()
453 if (priv->booster) { in stm32_adc_core_switches_supply_en()
455 * This is optional, as this is a trade-off between in stm32_adc_core_switches_supply_en()
458 ret = regulator_enable(priv->booster); in stm32_adc_core_switches_supply_en()
471 priv->vdda_uv); in stm32_adc_core_switches_supply_en()
478 if (priv->vdda_uv < 2700000) { in stm32_adc_core_switches_supply_dis()
479 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_dis()
480 regmap_write(priv->syscfg, STM32MP1_SYSCFG_PMCCLRR, in stm32_adc_core_switches_supply_dis()
482 regulator_disable(priv->vdd); in stm32_adc_core_switches_supply_dis()
485 if (priv->booster) in stm32_adc_core_switches_supply_dis()
486 regulator_disable(priv->booster); in stm32_adc_core_switches_supply_dis()
496 ret = regulator_enable(priv->vdda); in stm32_adc_core_hw_start()
502 ret = regulator_get_voltage(priv->vdda); in stm32_adc_core_hw_start()
507 priv->vdda_uv = ret; in stm32_adc_core_hw_start()
513 ret = regulator_enable(priv->vref); in stm32_adc_core_hw_start()
519 if (priv->bclk) { in stm32_adc_core_hw_start()
520 ret = clk_prepare_enable(priv->bclk); in stm32_adc_core_hw_start()
527 if (priv->aclk) { in stm32_adc_core_hw_start()
528 ret = clk_prepare_enable(priv->aclk); in stm32_adc_core_hw_start()
535 writel_relaxed(priv->ccr_bak, priv->common.base + priv->cfg->regs->ccr); in stm32_adc_core_hw_start()
540 if (priv->bclk) in stm32_adc_core_hw_start()
541 clk_disable_unprepare(priv->bclk); in stm32_adc_core_hw_start()
543 regulator_disable(priv->vref); in stm32_adc_core_hw_start()
547 regulator_disable(priv->vdda); in stm32_adc_core_hw_start()
558 priv->ccr_bak = readl_relaxed(priv->common.base + priv->cfg->regs->ccr); in stm32_adc_core_hw_stop()
559 if (priv->aclk) in stm32_adc_core_hw_stop()
560 clk_disable_unprepare(priv->aclk); in stm32_adc_core_hw_stop()
561 if (priv->bclk) in stm32_adc_core_hw_stop()
562 clk_disable_unprepare(priv->bclk); in stm32_adc_core_hw_stop()
563 regulator_disable(priv->vref); in stm32_adc_core_hw_stop()
565 regulator_disable(priv->vdda); in stm32_adc_core_hw_stop()
571 struct device_node *np = dev->of_node; in stm32_adc_core_switches_probe()
575 priv->syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_adc_core_switches_probe()
576 if (IS_ERR(priv->syscfg)) { in stm32_adc_core_switches_probe()
577 ret = PTR_ERR(priv->syscfg); in stm32_adc_core_switches_probe()
578 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
581 priv->syscfg = NULL; in stm32_adc_core_switches_probe()
585 if (priv->cfg->has_syscfg & HAS_VBOOSTER && in stm32_adc_core_switches_probe()
586 of_property_read_bool(np, "booster-supply")) { in stm32_adc_core_switches_probe()
587 priv->booster = devm_regulator_get_optional(dev, "booster"); in stm32_adc_core_switches_probe()
588 if (IS_ERR(priv->booster)) { in stm32_adc_core_switches_probe()
589 ret = PTR_ERR(priv->booster); in stm32_adc_core_switches_probe()
590 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
593 priv->booster = NULL; in stm32_adc_core_switches_probe()
598 if (priv->cfg->has_syscfg & HAS_ANASWVDD && in stm32_adc_core_switches_probe()
599 of_property_read_bool(np, "vdd-supply")) { in stm32_adc_core_switches_probe()
600 priv->vdd = devm_regulator_get_optional(dev, "vdd"); in stm32_adc_core_switches_probe()
601 if (IS_ERR(priv->vdd)) { in stm32_adc_core_switches_probe()
602 ret = PTR_ERR(priv->vdd); in stm32_adc_core_switches_probe()
603 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
606 priv->vdd = NULL; in stm32_adc_core_switches_probe()
610 if (priv->vdd) { in stm32_adc_core_switches_probe()
611 ret = regulator_enable(priv->vdd); in stm32_adc_core_switches_probe()
617 ret = regulator_get_voltage(priv->vdd); in stm32_adc_core_switches_probe()
620 regulator_disable(priv->vdd); in stm32_adc_core_switches_probe()
623 priv->vdd_uv = ret; in stm32_adc_core_switches_probe()
625 regulator_disable(priv->vdd); in stm32_adc_core_switches_probe()
634 struct device *dev = &pdev->dev; in stm32_adc_probe()
635 struct device_node *np = pdev->dev.of_node; in stm32_adc_probe()
640 if (!pdev->dev.of_node) in stm32_adc_probe()
641 return -ENODEV; in stm32_adc_probe()
643 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in stm32_adc_probe()
645 return -ENOMEM; in stm32_adc_probe()
646 platform_set_drvdata(pdev, &priv->common); in stm32_adc_probe()
648 priv->cfg = (const struct stm32_adc_priv_cfg *) in stm32_adc_probe()
649 of_match_device(dev->driver->of_match_table, dev)->data; in stm32_adc_probe()
652 priv->common.base = devm_ioremap_resource(&pdev->dev, res); in stm32_adc_probe()
653 if (IS_ERR(priv->common.base)) in stm32_adc_probe()
654 return PTR_ERR(priv->common.base); in stm32_adc_probe()
655 priv->common.phys_base = res->start; in stm32_adc_probe()
657 priv->vdda = devm_regulator_get(&pdev->dev, "vdda"); in stm32_adc_probe()
658 if (IS_ERR(priv->vdda)) in stm32_adc_probe()
659 return dev_err_probe(&pdev->dev, PTR_ERR(priv->vdda), in stm32_adc_probe()
662 priv->vref = devm_regulator_get(&pdev->dev, "vref"); in stm32_adc_probe()
663 if (IS_ERR(priv->vref)) in stm32_adc_probe()
664 return dev_err_probe(&pdev->dev, PTR_ERR(priv->vref), in stm32_adc_probe()
667 priv->aclk = devm_clk_get_optional(&pdev->dev, "adc"); in stm32_adc_probe()
668 if (IS_ERR(priv->aclk)) in stm32_adc_probe()
669 return dev_err_probe(&pdev->dev, PTR_ERR(priv->aclk), in stm32_adc_probe()
670 "Can't get 'adc' clock\n"); in stm32_adc_probe()
672 priv->bclk = devm_clk_get_optional(&pdev->dev, "bus"); in stm32_adc_probe()
673 if (IS_ERR(priv->bclk)) in stm32_adc_probe()
674 return dev_err_probe(&pdev->dev, PTR_ERR(priv->bclk), in stm32_adc_probe()
675 "Can't get 'bus' clock\n"); in stm32_adc_probe()
691 ret = regulator_get_voltage(priv->vref); in stm32_adc_probe()
693 dev_err(&pdev->dev, "vref get voltage failed, %d\n", ret); in stm32_adc_probe()
696 priv->common.vref_mv = ret / 1000; in stm32_adc_probe()
697 dev_dbg(&pdev->dev, "vref+=%dmV\n", priv->common.vref_mv); in stm32_adc_probe()
699 ret = of_property_read_u32(pdev->dev.of_node, "st,max-clk-rate-hz", in stm32_adc_probe()
702 priv->max_clk_rate = min(max_rate, priv->cfg->max_clk_rate_hz); in stm32_adc_probe()
704 priv->max_clk_rate = priv->cfg->max_clk_rate_hz; in stm32_adc_probe()
706 ret = priv->cfg->clk_sel(pdev, priv); in stm32_adc_probe()
714 ret = of_platform_populate(np, NULL, NULL, &pdev->dev); in stm32_adc_probe()
716 dev_err(&pdev->dev, "failed to populate DT children\n"); in stm32_adc_probe()
742 pm_runtime_get_sync(&pdev->dev); in stm32_adc_remove()
743 of_platform_depopulate(&pdev->dev); in stm32_adc_remove()
745 stm32_adc_core_hw_stop(&pdev->dev); in stm32_adc_remove()
746 pm_runtime_disable(&pdev->dev); in stm32_adc_remove()
747 pm_runtime_set_suspended(&pdev->dev); in stm32_adc_remove()
748 pm_runtime_put_noidle(&pdev->dev); in stm32_adc_remove()
807 .compatible = "st,stm32f4-adc-core",
810 .compatible = "st,stm32h7-adc-core",
813 .compatible = "st,stm32mp1-adc-core",
824 .name = "stm32-adc-core",
834 MODULE_ALIAS("platform:stm32-adc-core");