1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (c) 2014-2015 Imagination Technologies Ltd.
48  * As per device specification, wait six clock cycles after power-up to
70 	writel(val, adc_dev->reg_base + reg);  in cc10001_adc_write_reg()
76 	return readl(adc_dev->reg_base + reg);  in cc10001_adc_read_reg()
82 	ndelay(adc_dev->start_delay_ns);  in cc10001_adc_power_up()
147 	indio_dev = pf->indio_dev;  in cc10001_adc_trigger_h()
149 	data = adc_dev->buf;  in cc10001_adc_trigger_h()
151 	mutex_lock(&adc_dev->lock);  in cc10001_adc_trigger_h()
153 	if (!adc_dev->shared)  in cc10001_adc_trigger_h()
157 	delay_ns = adc_dev->eoc_delay_ns / CC10001_MAX_POLL_COUNT;  in cc10001_adc_trigger_h()
161 	for_each_set_bit(scan_idx, indio_dev->active_scan_mask,  in cc10001_adc_trigger_h()
162 				  indio_dev->masklength) {  in cc10001_adc_trigger_h()
164 		channel = indio_dev->channels[scan_idx].channel;  in cc10001_adc_trigger_h()
169 			dev_warn(&indio_dev->dev,  in cc10001_adc_trigger_h()
178 	if (!adc_dev->shared)  in cc10001_adc_trigger_h()
181 	mutex_unlock(&adc_dev->lock);  in cc10001_adc_trigger_h()
186 	iio_trigger_notify_done(indio_dev->trig);  in cc10001_adc_trigger_h()
192 					struct iio_chan_spec const *chan)  in cc10001_adc_read_raw_voltage()  argument
198 	if (!adc_dev->shared)  in cc10001_adc_read_raw_voltage()
202 	delay_ns = adc_dev->eoc_delay_ns / CC10001_MAX_POLL_COUNT;  in cc10001_adc_read_raw_voltage()
204 	cc10001_adc_start(adc_dev, chan->channel);  in cc10001_adc_read_raw_voltage()
206 	val = cc10001_adc_poll_done(indio_dev, chan->channel, delay_ns);  in cc10001_adc_read_raw_voltage()
208 	if (!adc_dev->shared)  in cc10001_adc_read_raw_voltage()
215 				 struct iio_chan_spec const *chan,  in cc10001_adc_read_raw()  argument
224 			return -EBUSY;  in cc10001_adc_read_raw()
225 		mutex_lock(&adc_dev->lock);  in cc10001_adc_read_raw()
226 		*val = cc10001_adc_read_raw_voltage(indio_dev, chan);  in cc10001_adc_read_raw()
227 		mutex_unlock(&adc_dev->lock);  in cc10001_adc_read_raw()
230 			return -EIO;  in cc10001_adc_read_raw()
234 		ret = regulator_get_voltage(adc_dev->reg);  in cc10001_adc_read_raw()
239 		*val2 = chan->scan_type.realbits;  in cc10001_adc_read_raw()
243 		return -EINVAL;  in cc10001_adc_read_raw()
252 	kfree(adc_dev->buf);  in cc10001_update_scan_mode()
253 	adc_dev->buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);  in cc10001_update_scan_mode()
254 	if (!adc_dev->buf)  in cc10001_update_scan_mode()
255 		return -ENOMEM;  in cc10001_update_scan_mode()
271 	indio_dev->num_channels = bitmap_weight(&channel_map,  in cc10001_adc_channel_init()
274 	chan_array = devm_kcalloc(&indio_dev->dev, indio_dev->num_channels,  in cc10001_adc_channel_init()
278 		return -ENOMEM;  in cc10001_adc_channel_init()
281 		struct iio_chan_spec *chan = &chan_array[idx];  in cc10001_adc_channel_init()  local
283 		chan->type = IIO_VOLTAGE;  in cc10001_adc_channel_init()
284 		chan->indexed = 1;  in cc10001_adc_channel_init()
285 		chan->channel = bit;  in cc10001_adc_channel_init()
286 		chan->scan_index = idx;  in cc10001_adc_channel_init()
287 		chan->scan_type.sign = 'u';  in cc10001_adc_channel_init()
288 		chan->scan_type.realbits = 10;  in cc10001_adc_channel_init()
289 		chan->scan_type.storagebits = 16;  in cc10001_adc_channel_init()
290 		chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);  in cc10001_adc_channel_init()
291 		chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);  in cc10001_adc_channel_init()
296 	timestamp->type = IIO_TIMESTAMP;  in cc10001_adc_channel_init()
297 	timestamp->channel = -1;  in cc10001_adc_channel_init()
298 	timestamp->scan_index = idx;  in cc10001_adc_channel_init()
299 	timestamp->scan_type.sign = 's';  in cc10001_adc_channel_init()
300 	timestamp->scan_type.realbits = 64;  in cc10001_adc_channel_init()
301 	timestamp->scan_type.storagebits = 64;  in cc10001_adc_channel_init()
303 	indio_dev->channels = chan_array;  in cc10001_adc_channel_init()
310 	struct device_node *node = pdev->dev.of_node;  in cc10001_adc_probe()
317 	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev));  in cc10001_adc_probe()
319 		return -ENOMEM;  in cc10001_adc_probe()
323 	channel_map = GENMASK(CC10001_ADC_NUM_CHANNELS - 1, 0);  in cc10001_adc_probe()
324 	if (!of_property_read_u32(node, "adc-reserved-channels", &ret)) {  in cc10001_adc_probe()
325 		adc_dev->shared = true;  in cc10001_adc_probe()
329 	adc_dev->reg = devm_regulator_get(&pdev->dev, "vref");  in cc10001_adc_probe()
330 	if (IS_ERR(adc_dev->reg))  in cc10001_adc_probe()
331 		return PTR_ERR(adc_dev->reg);  in cc10001_adc_probe()
333 	ret = regulator_enable(adc_dev->reg);  in cc10001_adc_probe()
337 	indio_dev->name = dev_name(&pdev->dev);  in cc10001_adc_probe()
338 	indio_dev->info = &cc10001_adc_info;  in cc10001_adc_probe()
339 	indio_dev->modes = INDIO_DIRECT_MODE;  in cc10001_adc_probe()
341 	adc_dev->reg_base = devm_platform_ioremap_resource(pdev, 0);  in cc10001_adc_probe()
342 	if (IS_ERR(adc_dev->reg_base)) {  in cc10001_adc_probe()
343 		ret = PTR_ERR(adc_dev->reg_base);  in cc10001_adc_probe()
347 	adc_dev->adc_clk = devm_clk_get(&pdev->dev, "adc");  in cc10001_adc_probe()
348 	if (IS_ERR(adc_dev->adc_clk)) {  in cc10001_adc_probe()
349 		dev_err(&pdev->dev, "failed to get the clock\n");  in cc10001_adc_probe()
350 		ret = PTR_ERR(adc_dev->adc_clk);  in cc10001_adc_probe()
354 	ret = clk_prepare_enable(adc_dev->adc_clk);  in cc10001_adc_probe()
356 		dev_err(&pdev->dev, "failed to enable the clock\n");  in cc10001_adc_probe()
360 	adc_clk_rate = clk_get_rate(adc_dev->adc_clk);  in cc10001_adc_probe()
362 		ret = -EINVAL;  in cc10001_adc_probe()
363 		dev_err(&pdev->dev, "null clock rate!\n");  in cc10001_adc_probe()
367 	adc_dev->eoc_delay_ns = NSEC_PER_SEC / adc_clk_rate;  in cc10001_adc_probe()
368 	adc_dev->start_delay_ns = adc_dev->eoc_delay_ns * CC10001_WAIT_CYCLES;  in cc10001_adc_probe()
371 	 * There is only one register to power-up/power-down the AUX ADC.  in cc10001_adc_probe()
372 	 * If the ADC is shared among multiple CPUs, always power it up here.  in cc10001_adc_probe()
373 	 * If the ADC is used only by the MIPS, power-up/power-down at runtime.  in cc10001_adc_probe()
375 	if (adc_dev->shared)  in cc10001_adc_probe()
378 	/* Setup the ADC channels available on the device */  in cc10001_adc_probe()
383 	mutex_init(&adc_dev->lock);  in cc10001_adc_probe()
401 	clk_disable_unprepare(adc_dev->adc_clk);  in cc10001_adc_probe()
403 	regulator_disable(adc_dev->reg);  in cc10001_adc_probe()
415 	clk_disable_unprepare(adc_dev->adc_clk);  in cc10001_adc_remove()
416 	regulator_disable(adc_dev->reg);  in cc10001_adc_remove()
422 	{ .compatible = "cosmic,10001-adc", },
429 		.name   = "cc10001-adc",
438 MODULE_DESCRIPTION("Cosmic Circuits ADC driver");