140 #define at91_adc_readl(st, reg) \  macro
257 		st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel));  in at91_adc_trigger_handler()
266 	at91_adc_readl(st, AT91_ADC_LCDR);  in at91_adc_trigger_handler()
282 		st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb));  in handle_adc_eoc_trigger()
284 		at91_adc_readl(st, AT91_ADC_LCDR);  in handle_adc_eoc_trigger()
303 	reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);  in at91_ts_sample()
314 	reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);  in at91_ts_sample()
325 	reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);  in at91_ts_sample()
357 	u32 status = at91_adc_readl(st, st->registers->status_register);  in at91_adc_rl_interrupt()
360 	status &= at91_adc_readl(st, AT91_ADC_IMR);  in at91_adc_rl_interrupt()
366 		reg = at91_adc_readl(st, AT91_ADC_MR);  in at91_adc_rl_interrupt()
378 		reg = at91_adc_readl(st, AT91_ADC_MR);  in at91_adc_rl_interrupt()
406 		st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))  in at91_adc_rl_interrupt()
408 		st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));  in at91_adc_rl_interrupt()
410 		st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))  in at91_adc_rl_interrupt()
412 		st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));  in at91_adc_rl_interrupt()
422 	u32 status = at91_adc_readl(st, st->registers->status_register);  in at91_adc_9x5_interrupt()
457 			at91_adc_readl(st, AT91_ADC_TSXPOSR);  in at91_adc_9x5_interrupt()
458 			at91_adc_readl(st, AT91_ADC_TSYPOSR);  in at91_adc_9x5_interrupt()
459 			at91_adc_readl(st, AT91_ADC_TSPRESSR);  in at91_adc_9x5_interrupt()
554 	u32 status = at91_adc_readl(st, reg->trigger_register);  in at91_adc_configure_trigger()
1035 		reg = at91_adc_readl(st, AT91_ADC_MR);  in at91_ts_hw_init()