Lines Matching full:st
333 #define at91_adc_readl(st, reg) readl_relaxed(st->base + reg) argument
334 #define at91_adc_writel(st, reg, val) writel_relaxed(val, st->base + reg) argument
508 static void at91_adc_config_emr(struct at91_adc_state *st) in at91_adc_config_emr() argument
511 unsigned int emr = at91_adc_readl(st, AT91_SAMA5D2_EMR); in at91_adc_config_emr()
520 switch (st->oversampling_ratio) { in at91_adc_config_emr()
535 at91_adc_writel(st, AT91_SAMA5D2_EMR, emr); in at91_adc_config_emr()
538 static int at91_adc_adjust_val_osr(struct at91_adc_state *st, int *val) in at91_adc_adjust_val_osr() argument
540 if (st->oversampling_ratio == AT91_OSR_1SAMPLES) { in at91_adc_adjust_val_osr()
546 } else if (st->oversampling_ratio == AT91_OSR_4SAMPLES) { in at91_adc_adjust_val_osr()
557 static void at91_adc_adjust_val_osr_array(struct at91_adc_state *st, void *buf, in at91_adc_adjust_val_osr_array() argument
573 at91_adc_adjust_val_osr(st, &val); in at91_adc_adjust_val_osr_array()
579 static int at91_adc_configure_touch(struct at91_adc_state *st, bool state) in at91_adc_configure_touch() argument
581 u32 clk_khz = st->current_sample_rate / 1000; in at91_adc_configure_touch()
588 at91_adc_writel(st, AT91_SAMA5D2_IDR, in at91_adc_configure_touch()
590 at91_adc_writel(st, AT91_SAMA5D2_TSMR, 0); in at91_adc_configure_touch()
616 at91_adc_writel(st, AT91_SAMA5D2_TSMR, tsmr); in at91_adc_configure_touch()
618 acr = at91_adc_readl(st, AT91_SAMA5D2_ACR); in at91_adc_configure_touch()
621 at91_adc_writel(st, AT91_SAMA5D2_ACR, acr); in at91_adc_configure_touch()
624 st->touch_st.sample_period_val = in at91_adc_configure_touch()
628 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_PEN); in at91_adc_configure_touch()
633 static u16 at91_adc_touch_pos(struct at91_adc_state *st, int reg) in at91_adc_touch_pos() argument
644 val = at91_adc_readl(st, reg); in at91_adc_touch_pos()
646 dev_dbg(&st->indio_dev->dev, "pos is 0\n"); in at91_adc_touch_pos()
652 dev_err(&st->indio_dev->dev, "scale is 0\n"); in at91_adc_touch_pos()
660 static u16 at91_adc_touch_x_pos(struct at91_adc_state *st) in at91_adc_touch_x_pos() argument
662 st->touch_st.x_pos = at91_adc_touch_pos(st, AT91_SAMA5D2_XPOSR); in at91_adc_touch_x_pos()
663 return st->touch_st.x_pos; in at91_adc_touch_x_pos()
666 static u16 at91_adc_touch_y_pos(struct at91_adc_state *st) in at91_adc_touch_y_pos() argument
668 return at91_adc_touch_pos(st, AT91_SAMA5D2_YPOSR); in at91_adc_touch_y_pos()
671 static u16 at91_adc_touch_pressure(struct at91_adc_state *st) in at91_adc_touch_pressure() argument
680 val = at91_adc_readl(st, AT91_SAMA5D2_PRESSR); in at91_adc_touch_pressure()
685 pres = rxp * (st->touch_st.x_pos * factor / 1024) * in at91_adc_touch_pressure()
699 static int at91_adc_read_position(struct at91_adc_state *st, int chan, u16 *val) in at91_adc_read_position() argument
702 if (!st->touch_st.touching) in at91_adc_read_position()
705 *val = at91_adc_touch_x_pos(st); in at91_adc_read_position()
707 *val = at91_adc_touch_y_pos(st); in at91_adc_read_position()
714 static int at91_adc_read_pressure(struct at91_adc_state *st, int chan, u16 *val) in at91_adc_read_pressure() argument
717 if (!st->touch_st.touching) in at91_adc_read_pressure()
720 *val = at91_adc_touch_pressure(st); in at91_adc_read_pressure()
730 struct at91_adc_state *st = iio_priv(indio); in at91_adc_configure_trigger() local
731 u32 status = at91_adc_readl(st, AT91_SAMA5D2_TRGR); in at91_adc_configure_trigger()
737 status |= st->selected_trig->trgmod_value; in at91_adc_configure_trigger()
740 at91_adc_writel(st, AT91_SAMA5D2_TRGR, status); in at91_adc_configure_trigger()
748 struct at91_adc_state *st = iio_priv(indio); in at91_adc_reenable_trigger() local
751 if (st->dma_st.dma_chan) in at91_adc_reenable_trigger()
754 enable_irq(st->irq); in at91_adc_reenable_trigger()
757 at91_adc_readl(st, AT91_SAMA5D2_LCDR); in at91_adc_reenable_trigger()
768 static int at91_adc_dma_size_done(struct at91_adc_state *st) in at91_adc_dma_size_done() argument
774 status = dmaengine_tx_status(st->dma_st.dma_chan, in at91_adc_dma_size_done()
775 st->dma_st.dma_chan->cookie, in at91_adc_dma_size_done()
781 i = st->dma_st.rx_buf_sz - state.residue; in at91_adc_dma_size_done()
784 if (i >= st->dma_st.buf_idx) in at91_adc_dma_size_done()
785 size = i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
787 size = st->dma_st.rx_buf_sz + i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
800 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_dma_start() local
806 if (!st->dma_st.dma_chan) in at91_adc_dma_start()
810 st->dma_st.buf_idx = 0; in at91_adc_dma_start()
816 st->dma_st.rx_buf_sz = 0; in at91_adc_dma_start()
826 st->dma_st.rx_buf_sz += chan->scan_type.storagebits / 8; in at91_adc_dma_start()
828 st->dma_st.rx_buf_sz *= st->dma_st.watermark; in at91_adc_dma_start()
831 desc = dmaengine_prep_dma_cyclic(st->dma_st.dma_chan, in at91_adc_dma_start()
832 st->dma_st.rx_dma_buf, in at91_adc_dma_start()
833 st->dma_st.rx_buf_sz, in at91_adc_dma_start()
834 st->dma_st.rx_buf_sz / 2, in at91_adc_dma_start()
849 dmaengine_terminate_async(st->dma_st.dma_chan); in at91_adc_dma_start()
854 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_GOVRE); in at91_adc_dma_start()
856 dma_async_issue_pending(st->dma_st.dma_chan); in at91_adc_dma_start()
859 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_dma_start()
867 struct at91_adc_state *st) in at91_adc_buffer_check_use_irq() argument
870 if (st->dma_st.dma_chan) in at91_adc_buffer_check_use_irq()
880 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_current_chan_is_touch() local
883 &st->touch_st.channels_bitmask, in at91_adc_current_chan_is_touch()
891 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_buffer_prepare() local
895 return at91_adc_configure_touch(st, true); in at91_adc_buffer_prepare()
921 cor = at91_adc_readl(st, AT91_SAMA5D2_COR); in at91_adc_buffer_prepare()
930 at91_adc_writel(st, AT91_SAMA5D2_COR, cor); in at91_adc_buffer_prepare()
932 at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); in at91_adc_buffer_prepare()
935 if (at91_adc_buffer_check_use_irq(indio_dev, st)) in at91_adc_buffer_prepare()
936 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_prepare()
943 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_buffer_postdisable() local
948 return at91_adc_configure_touch(st, false); in at91_adc_buffer_postdisable()
972 at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel)); in at91_adc_buffer_postdisable()
974 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
975 at91_adc_readl(st, chan->address); in at91_adc_buffer_postdisable()
978 if (at91_adc_buffer_check_use_irq(indio_dev, st)) in at91_adc_buffer_postdisable()
979 at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_postdisable()
982 at91_adc_readl(st, AT91_SAMA5D2_OVER); in at91_adc_buffer_postdisable()
985 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
986 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_buffer_postdisable()
1019 struct at91_adc_state *st = iio_priv(indio); in at91_adc_trigger_init() local
1021 st->trig = at91_adc_allocate_trigger(indio, st->selected_trig->name); in at91_adc_trigger_init()
1022 if (IS_ERR(st->trig)) { in at91_adc_trigger_init()
1025 return PTR_ERR(st->trig); in at91_adc_trigger_init()
1034 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler_nodma() local
1045 while ((at91_adc_readl(st, AT91_SAMA5D2_ISR) & mask) != mask && in at91_adc_trigger_handler_nodma()
1073 val = at91_adc_readl(st, chan->address); in at91_adc_trigger_handler_nodma()
1074 at91_adc_adjust_val_osr(st, &val); in at91_adc_trigger_handler_nodma()
1075 st->buffer[i] = val; in at91_adc_trigger_handler_nodma()
1077 st->buffer[i] = 0; in at91_adc_trigger_handler_nodma()
1082 iio_push_to_buffers_with_timestamp(indio_dev, st->buffer, in at91_adc_trigger_handler_nodma()
1088 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler_dma() local
1089 int transferred_len = at91_adc_dma_size_done(st); in at91_adc_trigger_handler_dma()
1094 u32 status = at91_adc_readl(st, AT91_SAMA5D2_ISR); in at91_adc_trigger_handler_dma()
1100 sample_size = div_s64(st->dma_st.rx_buf_sz, st->dma_st.watermark); in at91_adc_trigger_handler_dma()
1108 interval = div_s64((ns - st->dma_st.dma_ts), sample_count); in at91_adc_trigger_handler_dma()
1115 at91_adc_adjust_val_osr_array(st, in at91_adc_trigger_handler_dma()
1116 &st->dma_st.rx_buf[st->dma_st.buf_idx], in at91_adc_trigger_handler_dma()
1120 (st->dma_st.rx_buf + st->dma_st.buf_idx), in at91_adc_trigger_handler_dma()
1121 (st->dma_st.dma_ts + interval * sample_index)); in at91_adc_trigger_handler_dma()
1125 st->dma_st.buf_idx += sample_size; in at91_adc_trigger_handler_dma()
1127 if (st->dma_st.buf_idx >= st->dma_st.rx_buf_sz) in at91_adc_trigger_handler_dma()
1128 st->dma_st.buf_idx = 0; in at91_adc_trigger_handler_dma()
1132 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_trigger_handler_dma()
1139 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler() local
1146 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START); in at91_adc_trigger_handler()
1148 if (st->dma_st.dma_chan) in at91_adc_trigger_handler()
1191 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_setup_samp_freq() local
1194 f_per = clk_get_rate(st->per_clk); in at91_adc_setup_samp_freq()
1197 startup = at91_adc_startup_time(st->soc_info.startup_time, in at91_adc_setup_samp_freq()
1200 mr = at91_adc_readl(st, AT91_SAMA5D2_MR); in at91_adc_setup_samp_freq()
1204 at91_adc_writel(st, AT91_SAMA5D2_MR, mr); in at91_adc_setup_samp_freq()
1208 st->current_sample_rate = freq; in at91_adc_setup_samp_freq()
1211 static inline unsigned at91_adc_get_sample_freq(struct at91_adc_state *st) in at91_adc_get_sample_freq() argument
1213 return st->current_sample_rate; in at91_adc_get_sample_freq()
1218 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_touch_data_handler() local
1229 at91_adc_read_position(st, chan->channel, &val); in at91_adc_touch_data_handler()
1231 at91_adc_read_pressure(st, chan->channel, &val); in at91_adc_touch_data_handler()
1234 st->buffer[i] = val; in at91_adc_touch_data_handler()
1245 schedule_work(&st->touch_st.workq); in at91_adc_touch_data_handler()
1248 static void at91_adc_pen_detect_interrupt(struct at91_adc_state *st) in at91_adc_pen_detect_interrupt() argument
1250 at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_PEN); in at91_adc_pen_detect_interrupt()
1251 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_NOPEN | in at91_adc_pen_detect_interrupt()
1254 at91_adc_writel(st, AT91_SAMA5D2_TRGR, in at91_adc_pen_detect_interrupt()
1256 AT91_SAMA5D2_TRGR_TRGPER(st->touch_st.sample_period_val)); in at91_adc_pen_detect_interrupt()
1257 st->touch_st.touching = true; in at91_adc_pen_detect_interrupt()
1262 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_no_pen_detect_interrupt() local
1264 at91_adc_writel(st, AT91_SAMA5D2_TRGR, in at91_adc_no_pen_detect_interrupt()
1266 at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_NOPEN | in at91_adc_no_pen_detect_interrupt()
1269 st->touch_st.touching = false; in at91_adc_no_pen_detect_interrupt()
1273 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_PEN); in at91_adc_no_pen_detect_interrupt()
1280 struct at91_adc_state *st = container_of(touch_st, in at91_adc_workq_handler() local
1282 struct iio_dev *indio_dev = st->indio_dev; in at91_adc_workq_handler()
1284 iio_push_to_buffers(indio_dev, st->buffer); in at91_adc_workq_handler()
1290 struct at91_adc_state *st = iio_priv(indio); in at91_adc_interrupt() local
1291 u32 status = at91_adc_readl(st, AT91_SAMA5D2_ISR); in at91_adc_interrupt()
1292 u32 imr = at91_adc_readl(st, AT91_SAMA5D2_IMR); in at91_adc_interrupt()
1300 at91_adc_pen_detect_interrupt(st); in at91_adc_interrupt()
1313 status = at91_adc_readl(st, AT91_SAMA5D2_XPOSR); in at91_adc_interrupt()
1314 status = at91_adc_readl(st, AT91_SAMA5D2_YPOSR); in at91_adc_interrupt()
1315 status = at91_adc_readl(st, AT91_SAMA5D2_PRESSR); in at91_adc_interrupt()
1321 } else if (iio_buffer_enabled(indio) && st->dma_st.dma_chan) { in at91_adc_interrupt()
1327 st->conversion_value = at91_adc_readl(st, st->chan->address); in at91_adc_interrupt()
1328 st->conversion_done = true; in at91_adc_interrupt()
1329 wake_up_interruptible(&st->wq_data_available); in at91_adc_interrupt()
1337 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_info_raw() local
1350 mutex_lock(&st->lock); in at91_adc_read_info_raw()
1352 ret = at91_adc_read_position(st, chan->channel, in at91_adc_read_info_raw()
1355 mutex_unlock(&st->lock); in at91_adc_read_info_raw()
1358 return at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1364 mutex_lock(&st->lock); in at91_adc_read_info_raw()
1366 ret = at91_adc_read_pressure(st, chan->channel, in at91_adc_read_info_raw()
1369 mutex_unlock(&st->lock); in at91_adc_read_info_raw()
1372 return at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1380 mutex_lock(&st->lock); in at91_adc_read_info_raw()
1382 st->chan = chan; in at91_adc_read_info_raw()
1388 at91_adc_writel(st, AT91_SAMA5D2_COR, cor); in at91_adc_read_info_raw()
1389 at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); in at91_adc_read_info_raw()
1390 at91_adc_writel(st, AT91_SAMA5D2_IER, BIT(chan->channel)); in at91_adc_read_info_raw()
1391 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START); in at91_adc_read_info_raw()
1393 ret = wait_event_interruptible_timeout(st->wq_data_available, in at91_adc_read_info_raw()
1394 st->conversion_done, in at91_adc_read_info_raw()
1400 *val = st->conversion_value; in at91_adc_read_info_raw()
1401 ret = at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1404 st->conversion_done = false; in at91_adc_read_info_raw()
1407 at91_adc_writel(st, AT91_SAMA5D2_IDR, BIT(chan->channel)); in at91_adc_read_info_raw()
1408 at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel)); in at91_adc_read_info_raw()
1411 at91_adc_readl(st, AT91_SAMA5D2_LCDR); in at91_adc_read_info_raw()
1413 mutex_unlock(&st->lock); in at91_adc_read_info_raw()
1423 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_raw() local
1429 *val = st->vref_uv / 1000; in at91_adc_read_raw()
1436 *val = at91_adc_get_sample_freq(st); in at91_adc_read_raw()
1440 *val = st->oversampling_ratio; in at91_adc_read_raw()
1452 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_write_raw() local
1460 if (val == st->oversampling_ratio) in at91_adc_write_raw()
1462 st->oversampling_ratio = val; in at91_adc_write_raw()
1464 at91_adc_config_emr(st); in at91_adc_write_raw()
1467 if (val < st->soc_info.min_sample_rate || in at91_adc_write_raw()
1468 val > st->soc_info.max_sample_rate) in at91_adc_write_raw()
1481 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_dma_init() local
1492 if (st->dma_st.dma_chan) in at91_adc_dma_init()
1495 st->dma_st.dma_chan = dma_request_chan(&pdev->dev, "rx"); in at91_adc_dma_init()
1496 if (IS_ERR(st->dma_st.dma_chan)) { in at91_adc_dma_init()
1498 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
1502 st->dma_st.rx_buf = dma_alloc_coherent(st->dma_st.dma_chan->device->dev, in at91_adc_dma_init()
1504 &st->dma_st.rx_dma_buf, in at91_adc_dma_init()
1506 if (!st->dma_st.rx_buf) { in at91_adc_dma_init()
1513 config.src_addr = (phys_addr_t)(st->dma_st.phys_addr in at91_adc_dma_init()
1519 if (dmaengine_slave_config(st->dma_st.dma_chan, &config)) { in at91_adc_dma_init()
1525 dma_chan_name(st->dma_st.dma_chan)); in at91_adc_dma_init()
1530 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_init()
1531 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_init()
1533 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_init()
1534 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
1542 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_dma_disable() local
1548 if (!st->dma_st.dma_chan) in at91_adc_dma_disable()
1552 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_dma_disable()
1554 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_disable()
1555 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_disable()
1556 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_disable()
1557 st->dma_st.dma_chan = NULL; in at91_adc_dma_disable()
1564 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_set_watermark() local
1570 if (!st->selected_trig->hw_trig) { in at91_adc_set_watermark()
1576 st->dma_st.watermark = val; in at91_adc_set_watermark()
1603 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_update_scan_mode() local
1605 if (bitmap_subset(scan_mask, &st->touch_st.channels_bitmask, in at91_adc_update_scan_mode()
1612 if (bitmap_intersects(&st->touch_st.channels_bitmask, scan_mask, in at91_adc_update_scan_mode()
1620 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_hw_init() local
1622 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_hw_init()
1623 at91_adc_writel(st, AT91_SAMA5D2_IDR, 0xffffffff); in at91_adc_hw_init()
1628 at91_adc_writel(st, AT91_SAMA5D2_MR, in at91_adc_hw_init()
1631 at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate); in at91_adc_hw_init()
1634 at91_adc_config_emr(st); in at91_adc_hw_init()
1641 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_get_fifo_state() local
1643 return scnprintf(buf, PAGE_SIZE, "%d\n", !!st->dma_st.dma_chan); in at91_adc_get_fifo_state()
1650 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_get_watermark() local
1652 return scnprintf(buf, PAGE_SIZE, "%d\n", st->dma_st.watermark); in at91_adc_get_watermark()
1697 struct at91_adc_state *st; in at91_adc_probe() local
1702 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); in at91_adc_probe()
1712 st = iio_priv(indio_dev); in at91_adc_probe()
1713 st->indio_dev = indio_dev; in at91_adc_probe()
1715 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
1717 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
1719 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
1722 st->oversampling_ratio = AT91_OSR_1SAMPLES; in at91_adc_probe()
1726 &st->soc_info.min_sample_rate); in at91_adc_probe()
1735 &st->soc_info.max_sample_rate); in at91_adc_probe()
1743 &st->soc_info.startup_time); in at91_adc_probe()
1757 st->selected_trig = NULL; in at91_adc_probe()
1762 st->selected_trig = &at91_adc_trigger_list[i]; in at91_adc_probe()
1766 if (!st->selected_trig) { in at91_adc_probe()
1771 init_waitqueue_head(&st->wq_data_available); in at91_adc_probe()
1772 mutex_init(&st->lock); in at91_adc_probe()
1773 INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler); in at91_adc_probe()
1775 st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in at91_adc_probe()
1776 if (IS_ERR(st->base)) in at91_adc_probe()
1777 return PTR_ERR(st->base); in at91_adc_probe()
1780 st->dma_st.phys_addr = res->start; in at91_adc_probe()
1782 st->irq = platform_get_irq(pdev, 0); in at91_adc_probe()
1783 if (st->irq <= 0) { in at91_adc_probe()
1784 if (!st->irq) in at91_adc_probe()
1785 st->irq = -ENXIO; in at91_adc_probe()
1787 return st->irq; in at91_adc_probe()
1790 st->per_clk = devm_clk_get(&pdev->dev, "adc_clk"); in at91_adc_probe()
1791 if (IS_ERR(st->per_clk)) in at91_adc_probe()
1792 return PTR_ERR(st->per_clk); in at91_adc_probe()
1794 st->reg = devm_regulator_get(&pdev->dev, "vddana"); in at91_adc_probe()
1795 if (IS_ERR(st->reg)) in at91_adc_probe()
1796 return PTR_ERR(st->reg); in at91_adc_probe()
1798 st->vref = devm_regulator_get(&pdev->dev, "vref"); in at91_adc_probe()
1799 if (IS_ERR(st->vref)) in at91_adc_probe()
1800 return PTR_ERR(st->vref); in at91_adc_probe()
1802 ret = devm_request_irq(&pdev->dev, st->irq, at91_adc_interrupt, 0, in at91_adc_probe()
1807 ret = regulator_enable(st->reg); in at91_adc_probe()
1811 ret = regulator_enable(st->vref); in at91_adc_probe()
1815 st->vref_uv = regulator_get_voltage(st->vref); in at91_adc_probe()
1816 if (st->vref_uv <= 0) { in at91_adc_probe()
1823 ret = clk_prepare_enable(st->per_clk); in at91_adc_probe()
1835 if (st->selected_trig->hw_trig) { in at91_adc_probe()
1845 st->dma_st.watermark = 1; in at91_adc_probe()
1858 if (st->selected_trig->hw_trig) in at91_adc_probe()
1860 st->selected_trig->name); in at91_adc_probe()
1863 readl_relaxed(st->base + AT91_SAMA5D2_VERSION)); in at91_adc_probe()
1870 clk_disable_unprepare(st->per_clk); in at91_adc_probe()
1872 regulator_disable(st->vref); in at91_adc_probe()
1874 regulator_disable(st->reg); in at91_adc_probe()
1881 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_remove() local
1887 clk_disable_unprepare(st->per_clk); in at91_adc_remove()
1889 regulator_disable(st->vref); in at91_adc_remove()
1890 regulator_disable(st->reg); in at91_adc_remove()
1898 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_suspend() local
1906 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_suspend()
1908 clk_disable_unprepare(st->per_clk); in at91_adc_suspend()
1909 regulator_disable(st->vref); in at91_adc_suspend()
1910 regulator_disable(st->reg); in at91_adc_suspend()
1918 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_resume() local
1925 ret = regulator_enable(st->reg); in at91_adc_resume()
1929 ret = regulator_enable(st->vref); in at91_adc_resume()
1933 ret = clk_prepare_enable(st->per_clk); in at91_adc_resume()
1945 return at91_adc_configure_touch(st, true); in at91_adc_resume()
1947 return at91_adc_configure_trigger(st->trig, true); in at91_adc_resume()
1953 regulator_disable(st->vref); in at91_adc_resume()
1955 regulator_disable(st->reg); in at91_adc_resume()