Lines Matching +full:0 +full:x2f
37 #define VIA_IDE_ENABLE 0x40
38 #define VIA_IDE_CONFIG 0x41
39 #define VIA_FIFO_CONFIG 0x43
40 #define VIA_MISC_1 0x44
41 #define VIA_MISC_2 0x45
42 #define VIA_MISC_3 0x46
43 #define VIA_DRIVE_TIMING 0x48
44 #define VIA_8BIT_TIMING 0x4e
45 #define VIA_ADDRESS_SETUP 0x4c
46 #define VIA_UDMA_TIMING 0x50
48 #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
49 #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
50 #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
51 #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
52 #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
53 #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
54 #define VIA_SATA_PATA 0x80 /* SATA/PATA combined configuration */
72 { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
73 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
74 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
75 { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
76 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
77 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
78 { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST },
79 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
80 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
81 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
82 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
83 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
84 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
85 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
86 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
87 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
88 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
89 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
90 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
91 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
92 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
93 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
94 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
95 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
96 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
97 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
98 …{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VI…
99 { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
141 case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break; in via_set_speed()
142 case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break; in via_set_speed()
143 case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break; in via_set_speed()
144 case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break; in via_set_speed()
154 udma_etc &= ~0x20; in via_set_speed()
158 udma_etc &= 0x10; in via_set_speed()
246 for (i = 24; i >= 0; i -= 8) in via_cable_detect()
248 ((u >> i) & 0x20) && in via_cable_detect()
259 for (i = 24; i >= 0; i -= 8) in via_cable_detect()
260 if (((u >> i) & 0x10) || in via_cable_detect()
261 (((u >> i) & 0x20) && in via_cable_detect()
271 for (i = 24; i >= 0; i -= 8) in via_cable_detect()
272 if (((u >> i) & 0x10) || in via_cable_detect()
273 (((u >> i) & 0x20) && in via_cable_detect()
309 pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008); in init_chipset_via82cxxx()
312 pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008); in init_chipset_via82cxxx()
330 t &= 0x7f; in init_chipset_via82cxxx()
335 t &= (t & 0x9f); in init_chipset_via82cxxx()
337 case 2: t |= 0x00; break; /* 16 on primary */ in init_chipset_via82cxxx()
338 case 1: t |= 0x60; break; /* 16 on secondary */ in init_chipset_via82cxxx()
339 case 3: t |= 0x20; break; /* 8 pri 8 sec */ in init_chipset_via82cxxx()
345 return 0; in init_chipset_via82cxxx()
370 if (pdev->subsystem_vendor == 0x161F && in via_cable_override()
371 pdev->subsystem_device == 0x2032) in via_cable_override()
374 return 0; in via_cable_override()
386 if ((vdev->via_config->flags & VIA_SATA_PATA) && hwif->channel == 0) in via82cxxx_cable_detect()
404 .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
437 (fls(via_config->udma_mask) - 1) : 0]); in via_init_one()
459 d.enablebits[1].reg = d.enablebits[0].reg = 0; in via_init_one()
466 if ((via_config->flags & VIA_NO_UNMASK) == 0) in via_init_one()
497 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), 0 },
498 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), 0 },
499 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
504 { 0, },