Lines Matching +full:0 +full:x52
58 #define ATA_16 0x01
59 #define ATA_33 0x02
60 #define ATA_66 0x03
61 #define ATA_100a 0x04 /* SiS730/SiS550 is ATA100 with ATA66 layout */
62 #define ATA_100 0x05
63 #define ATA_133a 0x06 /* SiS961b with 133 support */
64 #define ATA_133 0x07 /* SiS962/963 */
112 /* {0, ATA_16, ATA_33, ATA_66, ATA_100a, ATA_100, ATA_133} */
113 static u8 cycle_time_offset[] = { 0, 0, 5, 4, 4, 0, 0 };
114 static u8 cycle_time_range[] = { 0, 0, 2, 3, 3, 4, 4 };
116 { 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */
117 { 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */
118 { 3, 2, 1, 0, 0, 0, 0 }, /* ATA_33 */
119 { 7, 5, 3, 2, 1, 0, 0 }, /* ATA_66 */
120 { 7, 5, 3, 2, 1, 0, 0 }, /* ATA_100a (730 specific),
122 { 11, 7, 5, 4, 2, 1, 0 }, /* ATA_100 */
129 { 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */
130 { 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */
131 { 2, 1, 1, 0, 0, 0, 0 },
132 { 4, 3, 2, 1, 0, 0, 0 },
133 { 4, 3, 2, 1, 0, 0, 0 },
134 { 6, 4, 3, 1, 1, 1, 0 },
142 { 0, 0, 0, 0, 0, 0, 0, 0 },
143 { 0, 0, 0, 0, 0, 0, 0, 0 },
144 { 2, 1, 0, 0, 0, 1, 0, 0 },
152 { 0, 0, 0, 0, 0, 0, 0, 0 },
153 { 0, 0, 0, 0, 0, 0, 0, 0 },
162 { 0, 0, 0, 0, 0, 0, 0, 0 },
163 { 0, 0, 0, 0, 0, 0, 0, 0 },
164 { 9, 2, 0, 2, 0, 7, 1, 1 },
190 u32 reg54 = 0; in sis_ata133_get_base()
192 pci_read_config_dword(dev, 0x54, ®54); in sis_ata133_get_base()
194 return ((reg54 & 0x40000000) ? 0x70 : 0x40) + drive->dn * 4; in sis_ata133_get_base()
200 u16 t1 = 0; in sis_ata16_program_timings()
201 u8 drive_pci = 0x40 + drive->dn * 2; in sis_ata16_program_timings()
203 const u16 pio_timings[] = { 0x000, 0x607, 0x404, 0x303, 0x301 }; in sis_ata16_program_timings()
204 const u16 mwdma_timings[] = { 0x008, 0x302, 0x301 }; in sis_ata16_program_timings()
209 t1 &= ~0x070f; in sis_ata16_program_timings()
212 t1 &= ~0x8000; /* disable UDMA */ in sis_ata16_program_timings()
223 u8 t1, drive_pci = 0x40 + drive->dn * 2; in sis_ata100_program_timings()
225 /* timing bits: 7:4 active 3:0 recovery */ in sis_ata100_program_timings()
226 const u8 pio_timings[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; in sis_ata100_program_timings()
227 const u8 mwdma_timings[] = { 0x08, 0x32, 0x31 }; in sis_ata100_program_timings()
230 u8 t2 = 0; in sis_ata100_program_timings()
233 t2 &= ~0x80; /* disable UDMA */ in sis_ata100_program_timings()
246 u32 t1 = 0; in sis_ata133_program_timings()
251 t1 &= 0xc0c00fff; in sis_ata133_program_timings()
252 clk = (t1 & 0x08) ? ATA_133 : ATA_100; in sis_ata133_program_timings()
254 t1 &= ~0x04; /* disable UDMA */ in sis_ata133_program_timings()
279 u8 reg4bh = 0; in config_drive_art_rwp()
280 u8 rw_prefetch = 0; in config_drive_art_rwp()
282 pci_read_config_byte(dev, 0x4b, ®4bh); in config_drive_art_rwp()
284 rw_prefetch = reg4bh & ~(0x11 << drive->dn); in config_drive_art_rwp()
287 rw_prefetch |= 0x11 << drive->dn; in config_drive_art_rwp()
290 pci_write_config_byte(dev, 0x4b, rw_prefetch); in config_drive_art_rwp()
302 u32 regdw = 0; in sis_ata133_program_udma_timings()
307 regdw |= 0x04; in sis_ata133_program_udma_timings()
308 regdw &= 0xfffff00f; in sis_ata133_program_udma_timings()
310 clk = (regdw & 0x08) ? ATA_133 : ATA_100; in sis_ata133_program_udma_timings()
321 u8 drive_pci = 0x40 + drive->dn * 2, reg = 0, i = chipset_family; in sis_ata33_program_udma_timings()
326 reg |= 0x80; in sis_ata33_program_udma_timings()
328 reg &= ~((0xff >> (8 - cycle_time_range[i])) << cycle_time_offset[i]); in sis_ata33_program_udma_timings()
356 u32 regdw = 0; in sis_ata133_udma_filter()
362 return (regdw & 0x08) ? ATA_UDMA6 : ATA_UDMA5; in sis_ata133_udma_filter()
368 int i = 0; in sis_find_family()
370 chipset_family = 0; in sis_find_family()
372 for (i = 0; i < ARRAY_SIZE(SiSHostChipInfo) && !chipset_family; i++) { in sis_find_family()
383 if (host->revision >= 0x30) in sis_find_family()
399 pci_read_config_dword(dev, 0x54, &idemisc); in sis_find_family()
400 pci_write_config_dword(dev, 0x54, (idemisc & 0x7fffffff)); in sis_find_family()
402 pci_write_config_dword(dev, 0x54, idemisc); in sis_find_family()
404 if (trueid == 0x5518) { in sis_find_family()
411 * as it expects the enablebits at 0x4a. in sis_find_family()
413 if ((idemisc & 0x40000000) == 0) { in sis_find_family()
414 pci_write_config_dword(dev, 0x54, idemisc | 0x40000000); in sis_find_family()
428 pci_read_config_byte(dev, 0x4a, &idecfg); in sis_find_family()
429 pci_write_config_byte(dev, 0x4a, idecfg | 0x10); in sis_find_family()
431 pci_write_config_byte(dev, 0x4a, idecfg); in sis_find_family()
433 if (trueid == 0x5517) { /* SiS 961/961B */ in sis_find_family()
435 lpc_bridge = pci_get_slot(dev->bus, 0x10); /* Bus 0, Dev 2, Fn 0 */ in sis_find_family()
436 pci_read_config_byte(dev, 0x49, &prefctl); in sis_find_family()
439 if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) { in sis_find_family()
466 pci_read_config_word(dev, 0x50, ®w); in init_chipset_sis5513()
467 if (regw & 0x08) in init_chipset_sis5513()
468 pci_write_config_word(dev, 0x50, regw&0xfff7); in init_chipset_sis5513()
469 pci_read_config_word(dev, 0x52, ®w); in init_chipset_sis5513()
470 if (regw & 0x08) in init_chipset_sis5513()
471 pci_write_config_word(dev, 0x52, regw&0xfff7); in init_chipset_sis5513()
476 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x80); in init_chipset_sis5513()
478 pci_read_config_byte(dev, 0x49, ®); in init_chipset_sis5513()
479 if (!(reg & 0x01)) in init_chipset_sis5513()
480 pci_write_config_byte(dev, 0x49, reg|0x01); in init_chipset_sis5513()
485 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x10); in init_chipset_sis5513()
488 pci_read_config_byte(dev, 0x52, ®); in init_chipset_sis5513()
489 if (!(reg & 0x04)) in init_chipset_sis5513()
490 pci_write_config_byte(dev, 0x52, reg|0x04); in init_chipset_sis5513()
494 pci_read_config_byte(dev, 0x09, ®); in init_chipset_sis5513()
495 if ((reg & 0x0f) != 0x00) in init_chipset_sis5513()
496 pci_write_config_byte(dev, 0x09, reg&0xf0); in init_chipset_sis5513()
501 pci_read_config_byte(dev, 0x52, ®); in init_chipset_sis5513()
502 if (!(reg & 0x08)) in init_chipset_sis5513()
503 pci_write_config_byte(dev, 0x52, reg|0x08); in init_chipset_sis5513()
507 return 0; in init_chipset_sis5513()
518 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
519 { 0x5513, 0x1734, 0x105f }, /* FSC Amilo A1630 */
520 { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */
522 { 0, }
528 const struct sis_laptop *lap = &sis_laptop[0]; in sis_cable_detect()
529 u8 ata66 = 0; in sis_cable_detect()
540 u16 regw = 0; in sis_cable_detect()
541 u16 reg_addr = hwif->channel ? 0x52: 0x50; in sis_cable_detect()
543 ata66 = (regw & 0x8000) ? 0 : 1; in sis_cable_detect()
545 u8 reg48h = 0; in sis_cable_detect()
546 u8 mask = hwif->channel ? 0x20 : 0x10; in sis_cable_detect()
547 pci_read_config_byte(pdev, 0x48, ®48h); in sis_cable_detect()
548 ata66 = (reg48h & mask) ? 0 : 1; in sis_cable_detect()
570 .enablebits = { {0x4a, 0x02, 0x02}, {0x4a, 0x04, 0x04} },
579 u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f }; in sis5513_init_one()
586 if (sis_find_family(dev) == 0) in sis5513_init_one()
606 { PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_5513), 0 },
607 { PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_5518), 0 },
608 { PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_1180), 0 },
609 { 0, },