1 // SPDX-License-Identifier: GPL-2.0-or-later
3  *  Copyright (c) 1999-2001 Vojtech Pavlik
4  *  Copyright (c) 2007-2008 Bartlomiej Zolnierkiewicz
7  * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
16  * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
17  * These were taken from ATA/ATAPI-6 standard, rev 0a, except
57 struct ide_timing *ide_timing_find_mode(u8 speed)  in ide_timing_find_mode()  argument
61 	for (t = ide_timing; t->mode != speed; t++)  in ide_timing_find_mode()
62 		if (t->mode == 0xff)  in ide_timing_find_mode()
70 	u16 *id = drive->id;  in ide_pio_cycle_time()
75 		if (ata_id_has_iordy(drive->id))  in ide_pio_cycle_time()
80 		/* conservative "downgrade" for all pre-ATA2 drives */  in ide_pio_cycle_time()
81 		if (pio < 3 && cycle < t->cycle)  in ide_pio_cycle_time()
89 	return cycle ? cycle : t->cycle;  in ide_pio_cycle_time()
93 #define ENOUGH(v, unit)		(((v) - 1) / (unit) + 1)
99 	q->setup   = EZ(t->setup,   T);  in ide_timing_quantize()
100 	q->act8b   = EZ(t->act8b,   T);  in ide_timing_quantize()
101 	q->rec8b   = EZ(t->rec8b,   T);  in ide_timing_quantize()
102 	q->cyc8b   = EZ(t->cyc8b,   T);  in ide_timing_quantize()
103 	q->active  = EZ(t->active,  T);  in ide_timing_quantize()
104 	q->recover = EZ(t->recover, T);  in ide_timing_quantize()
105 	q->cycle   = EZ(t->cycle,   T);  in ide_timing_quantize()
106 	q->udma    = EZ(t->udma,    UT);  in ide_timing_quantize()
113 		m->setup   = max(a->setup,   b->setup);  in ide_timing_merge()
115 		m->act8b   = max(a->act8b,   b->act8b);  in ide_timing_merge()
117 		m->rec8b   = max(a->rec8b,   b->rec8b);  in ide_timing_merge()
119 		m->cyc8b   = max(a->cyc8b,   b->cyc8b);  in ide_timing_merge()
121 		m->active  = max(a->active,  b->active);  in ide_timing_merge()
123 		m->recover = max(a->recover, b->recover);  in ide_timing_merge()
125 		m->cycle   = max(a->cycle,   b->cycle);  in ide_timing_merge()
127 		m->udma    = max(a->udma,    b->udma);  in ide_timing_merge()
131 int ide_timing_compute(ide_drive_t *drive, u8 speed,  in ide_timing_compute()  argument
134 	u16 *id = drive->id;  in ide_timing_compute()
140 	s = ide_timing_find_mode(speed);  in ide_timing_compute()
142 		return -EINVAL;  in ide_timing_compute()
156 		if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {  in ide_timing_compute()
157 			if (speed <= XFER_PIO_2)  in ide_timing_compute()
159 			else if ((speed <= XFER_PIO_4) ||  in ide_timing_compute()
160 				 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))  in ide_timing_compute()
162 		} else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)  in ide_timing_compute()
178 	if (speed >= XFER_SW_DMA_0) {  in ide_timing_compute()
179 		ide_timing_compute(drive, drive->pio_mode, &p, T, UT);  in ide_timing_compute()
186 	if (t->act8b + t->rec8b < t->cyc8b) {  in ide_timing_compute()
187 		t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;  in ide_timing_compute()
188 		t->rec8b = t->cyc8b - t->act8b;  in ide_timing_compute()
191 	if (t->active + t->recover < t->cycle) {  in ide_timing_compute()
192 		t->active += (t->cycle - (t->active + t->recover)) / 2;  in ide_timing_compute()
193 		t->recover = t->cycle - t->active;  in ide_timing_compute()