Lines Matching refs:REG_CMD
16 #define REG_CMD 0x04 macro
101 ctl = zx2967_i2c_readl(i2c, REG_CMD); in zx2967_i2c_start_ctrl()
108 zx2967_i2c_writel(i2c, ctl, REG_CMD); in zx2967_i2c_start_ctrl()
183 zx2967_i2c_writel(i2c, val, REG_CMD); in zx2967_i2c_reset_hardware()
239 val = zx2967_i2c_readl(i2c, REG_CMD) | I2C_ADDR_MODE_TEN; in zx2967_set_addr()
241 val = zx2967_i2c_readl(i2c, REG_CMD) & ~I2C_ADDR_MODE_TEN; in zx2967_set_addr()
242 zx2967_i2c_writel(i2c, val, REG_CMD); in zx2967_set_addr()
334 val = zx2967_i2c_readl(i2c, REG_CMD); in zx2967_smbus_xfer_prepare()
336 zx2967_i2c_writel(i2c, val, REG_CMD); in zx2967_smbus_xfer_prepare()
367 val = zx2967_i2c_readl(i2c, REG_CMD); in zx2967_smbus_xfer_read()
369 zx2967_i2c_writel(i2c, val, REG_CMD); in zx2967_smbus_xfer_read()
371 val = zx2967_i2c_readl(i2c, REG_CMD); in zx2967_smbus_xfer_read()
373 zx2967_i2c_writel(i2c, val, REG_CMD); in zx2967_smbus_xfer_read()
408 val = zx2967_i2c_readl(i2c, REG_CMD); in zx2967_smbus_xfer_write()
410 zx2967_i2c_writel(i2c, val, REG_CMD); in zx2967_smbus_xfer_write()