Lines Matching full:i2c
3 * i2c-xiic.c
24 #include <linux/i2c.h>
27 #include <linux/platform_data/i2c-xiic.h>
34 #define DRIVER_NAME "xiic-i2c"
48 * struct xiic_i2c - Internal representation of the XIIC I2C bus
170 #define xiic_tx_space(i2c) ((i2c)->tx_msg->len - (i2c)->tx_pos) argument
171 #define xiic_rx_space(i2c) ((i2c)->rx_msg->len - (i2c)->rx_pos) argument
173 static int xiic_start_xfer(struct xiic_i2c *i2c);
174 static void __xiic_start_xfer(struct xiic_i2c *i2c);
184 static inline void xiic_setreg8(struct xiic_i2c *i2c, int reg, u8 value) in xiic_setreg8() argument
186 if (i2c->endianness == LITTLE) in xiic_setreg8()
187 iowrite8(value, i2c->base + reg); in xiic_setreg8()
189 iowrite8(value, i2c->base + reg + 3); in xiic_setreg8()
192 static inline u8 xiic_getreg8(struct xiic_i2c *i2c, int reg) in xiic_getreg8() argument
196 if (i2c->endianness == LITTLE) in xiic_getreg8()
197 ret = ioread8(i2c->base + reg); in xiic_getreg8()
199 ret = ioread8(i2c->base + reg + 3); in xiic_getreg8()
203 static inline void xiic_setreg16(struct xiic_i2c *i2c, int reg, u16 value) in xiic_setreg16() argument
205 if (i2c->endianness == LITTLE) in xiic_setreg16()
206 iowrite16(value, i2c->base + reg); in xiic_setreg16()
208 iowrite16be(value, i2c->base + reg + 2); in xiic_setreg16()
211 static inline void xiic_setreg32(struct xiic_i2c *i2c, int reg, int value) in xiic_setreg32() argument
213 if (i2c->endianness == LITTLE) in xiic_setreg32()
214 iowrite32(value, i2c->base + reg); in xiic_setreg32()
216 iowrite32be(value, i2c->base + reg); in xiic_setreg32()
219 static inline int xiic_getreg32(struct xiic_i2c *i2c, int reg) in xiic_getreg32() argument
223 if (i2c->endianness == LITTLE) in xiic_getreg32()
224 ret = ioread32(i2c->base + reg); in xiic_getreg32()
226 ret = ioread32be(i2c->base + reg); in xiic_getreg32()
230 static inline void xiic_irq_dis(struct xiic_i2c *i2c, u32 mask) in xiic_irq_dis() argument
232 u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_irq_dis()
233 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask); in xiic_irq_dis()
236 static inline void xiic_irq_en(struct xiic_i2c *i2c, u32 mask) in xiic_irq_en() argument
238 u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_irq_en()
239 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask); in xiic_irq_en()
242 static inline void xiic_irq_clr(struct xiic_i2c *i2c, u32 mask) in xiic_irq_clr() argument
244 u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); in xiic_irq_clr()
245 xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); in xiic_irq_clr()
248 static inline void xiic_irq_clr_en(struct xiic_i2c *i2c, u32 mask) in xiic_irq_clr_en() argument
250 xiic_irq_clr(i2c, mask); in xiic_irq_clr_en()
251 xiic_irq_en(i2c, mask); in xiic_irq_clr_en()
254 static int xiic_clear_rx_fifo(struct xiic_i2c *i2c) in xiic_clear_rx_fifo() argument
260 for (sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET); in xiic_clear_rx_fifo()
262 sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET)) { in xiic_clear_rx_fifo()
263 xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET); in xiic_clear_rx_fifo()
265 dev_err(i2c->dev, "Failed to clear rx fifo\n"); in xiic_clear_rx_fifo()
273 static int xiic_reinit(struct xiic_i2c *i2c) in xiic_reinit() argument
277 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); in xiic_reinit()
280 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); in xiic_reinit()
283 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); in xiic_reinit()
286 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK); in xiic_reinit()
289 ret = xiic_clear_rx_fifo(i2c); in xiic_reinit()
294 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK); in xiic_reinit()
296 xiic_irq_clr_en(i2c, XIIC_INTR_ARB_LOST_MASK); in xiic_reinit()
301 static void xiic_deinit(struct xiic_i2c *i2c) in xiic_deinit() argument
305 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); in xiic_deinit()
308 cr = xiic_getreg8(i2c, XIIC_CR_REG_OFFSET); in xiic_deinit()
309 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, cr & ~XIIC_CR_ENABLE_DEVICE_MASK); in xiic_deinit()
312 static void xiic_read_rx(struct xiic_i2c *i2c) in xiic_read_rx() argument
317 bytes_in_fifo = xiic_getreg8(i2c, XIIC_RFO_REG_OFFSET) + 1; in xiic_read_rx()
319 dev_dbg(i2c->adap.dev.parent, in xiic_read_rx()
321 __func__, bytes_in_fifo, xiic_rx_space(i2c), in xiic_read_rx()
322 xiic_getreg8(i2c, XIIC_SR_REG_OFFSET), in xiic_read_rx()
323 xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); in xiic_read_rx()
325 if (bytes_in_fifo > xiic_rx_space(i2c)) in xiic_read_rx()
326 bytes_in_fifo = xiic_rx_space(i2c); in xiic_read_rx()
329 i2c->rx_msg->buf[i2c->rx_pos++] = in xiic_read_rx()
330 xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET); in xiic_read_rx()
332 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, in xiic_read_rx()
333 (xiic_rx_space(i2c) > IIC_RX_FIFO_DEPTH) ? in xiic_read_rx()
334 IIC_RX_FIFO_DEPTH - 1 : xiic_rx_space(i2c) - 1); in xiic_read_rx()
337 static int xiic_tx_fifo_space(struct xiic_i2c *i2c) in xiic_tx_fifo_space() argument
340 return IIC_TX_FIFO_DEPTH - xiic_getreg8(i2c, XIIC_TFO_REG_OFFSET) - 1; in xiic_tx_fifo_space()
343 static void xiic_fill_tx_fifo(struct xiic_i2c *i2c) in xiic_fill_tx_fifo() argument
345 u8 fifo_space = xiic_tx_fifo_space(i2c); in xiic_fill_tx_fifo()
346 int len = xiic_tx_space(i2c); in xiic_fill_tx_fifo()
350 dev_dbg(i2c->adap.dev.parent, "%s entry, len: %d, fifo space: %d\n", in xiic_fill_tx_fifo()
354 u16 data = i2c->tx_msg->buf[i2c->tx_pos++]; in xiic_fill_tx_fifo()
355 if ((xiic_tx_space(i2c) == 0) && (i2c->nmsgs == 1)) { in xiic_fill_tx_fifo()
358 dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__); in xiic_fill_tx_fifo()
360 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data); in xiic_fill_tx_fifo()
364 static void xiic_wakeup(struct xiic_i2c *i2c, int code) in xiic_wakeup() argument
366 i2c->tx_msg = NULL; in xiic_wakeup()
367 i2c->rx_msg = NULL; in xiic_wakeup()
368 i2c->nmsgs = 0; in xiic_wakeup()
369 i2c->state = code; in xiic_wakeup()
370 wake_up(&i2c->wait); in xiic_wakeup()
375 struct xiic_i2c *i2c = dev_id; in xiic_process() local
384 mutex_lock(&i2c->lock); in xiic_process()
385 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); in xiic_process()
386 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_process()
389 dev_dbg(i2c->adap.dev.parent, "%s: IER: 0x%x, ISR: 0x%x, pend: 0x%x\n", in xiic_process()
391 dev_dbg(i2c->adap.dev.parent, "%s: SR: 0x%x, msg: %p, nmsgs: %d\n", in xiic_process()
392 __func__, xiic_getreg8(i2c, XIIC_SR_REG_OFFSET), in xiic_process()
393 i2c->tx_msg, i2c->nmsgs); in xiic_process()
406 dev_dbg(i2c->adap.dev.parent, "%s error\n", __func__); in xiic_process()
412 xiic_reinit(i2c); in xiic_process()
414 if (i2c->rx_msg) in xiic_process()
415 xiic_wakeup(i2c, STATE_ERROR); in xiic_process()
416 if (i2c->tx_msg) in xiic_process()
417 xiic_wakeup(i2c, STATE_ERROR); in xiic_process()
423 if (!i2c->rx_msg) { in xiic_process()
424 dev_dbg(i2c->adap.dev.parent, in xiic_process()
426 xiic_clear_rx_fifo(i2c); in xiic_process()
430 xiic_read_rx(i2c); in xiic_process()
431 if (xiic_rx_space(i2c) == 0) { in xiic_process()
433 i2c->rx_msg = NULL; in xiic_process()
438 dev_dbg(i2c->adap.dev.parent, in xiic_process()
440 __func__, i2c->nmsgs); in xiic_process()
446 if (i2c->nmsgs > 1) { in xiic_process()
447 i2c->nmsgs--; in xiic_process()
448 i2c->tx_msg++; in xiic_process()
449 dev_dbg(i2c->adap.dev.parent, in xiic_process()
452 __xiic_start_xfer(i2c); in xiic_process()
461 xiic_irq_dis(i2c, XIIC_INTR_BNB_MASK); in xiic_process()
463 if (!i2c->tx_msg) in xiic_process()
466 if ((i2c->nmsgs == 1) && !i2c->rx_msg && in xiic_process()
467 xiic_tx_space(i2c) == 0) in xiic_process()
468 xiic_wakeup(i2c, STATE_DONE); in xiic_process()
470 xiic_wakeup(i2c, STATE_ERROR); in xiic_process()
478 if (!i2c->tx_msg) { in xiic_process()
479 dev_dbg(i2c->adap.dev.parent, in xiic_process()
484 xiic_fill_tx_fifo(i2c); in xiic_process()
487 if (!xiic_tx_space(i2c) && xiic_tx_fifo_space(i2c) >= 2) { in xiic_process()
488 dev_dbg(i2c->adap.dev.parent, in xiic_process()
490 __func__, i2c->nmsgs); in xiic_process()
491 if (i2c->nmsgs > 1) { in xiic_process()
492 i2c->nmsgs--; in xiic_process()
493 i2c->tx_msg++; in xiic_process()
494 __xiic_start_xfer(i2c); in xiic_process()
496 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK); in xiic_process()
498 dev_dbg(i2c->adap.dev.parent, in xiic_process()
502 } else if (!xiic_tx_space(i2c) && (i2c->nmsgs == 1)) in xiic_process()
506 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK); in xiic_process()
509 dev_dbg(i2c->adap.dev.parent, "%s clr: 0x%x\n", __func__, clr); in xiic_process()
511 xiic_setreg32(i2c, XIIC_IISR_OFFSET, clr); in xiic_process()
512 mutex_unlock(&i2c->lock); in xiic_process()
516 static int xiic_bus_busy(struct xiic_i2c *i2c) in xiic_bus_busy() argument
518 u8 sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET); in xiic_bus_busy()
523 static int xiic_busy(struct xiic_i2c *i2c) in xiic_busy() argument
528 if (i2c->tx_msg) in xiic_busy()
533 * should ignore it, since bus will never be released and i2c will be in xiic_busy()
536 if (i2c->singlemaster) { in xiic_busy()
544 err = xiic_bus_busy(i2c); in xiic_busy()
547 err = xiic_bus_busy(i2c); in xiic_busy()
553 static void xiic_start_recv(struct xiic_i2c *i2c) in xiic_start_recv() argument
556 struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg; in xiic_start_recv()
560 xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK | XIIC_INTR_TX_ERROR_MASK); in xiic_start_recv()
571 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, rx_watermark - 1); in xiic_start_recv()
576 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, in xiic_start_recv()
579 xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK); in xiic_start_recv()
581 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, in xiic_start_recv()
582 msg->len | ((i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0)); in xiic_start_recv()
585 if (i2c->nmsgs == 1) in xiic_start_recv()
587 xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK); in xiic_start_recv()
590 i2c->tx_pos = msg->len; in xiic_start_recv()
593 static void xiic_start_send(struct xiic_i2c *i2c) in xiic_start_send() argument
595 struct i2c_msg *msg = i2c->tx_msg; in xiic_start_send()
597 xiic_irq_clr(i2c, XIIC_INTR_TX_ERROR_MASK); in xiic_start_send()
599 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, len: %d", in xiic_start_send()
601 dev_dbg(i2c->adap.dev.parent, "%s entry, ISR: 0x%x, CR: 0x%x\n", in xiic_start_send()
602 __func__, xiic_getreg32(i2c, XIIC_IISR_OFFSET), in xiic_start_send()
603 xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); in xiic_start_send()
609 if ((i2c->nmsgs == 1) && msg->len == 0) in xiic_start_send()
613 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data); in xiic_start_send()
616 xiic_fill_tx_fifo(i2c); in xiic_start_send()
619 xiic_irq_clr_en(i2c, XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_ERROR_MASK | in xiic_start_send()
625 struct xiic_i2c *i2c = dev_id; in xiic_isr() local
632 dev_dbg(i2c->adap.dev.parent, "%s entry\n", __func__); in xiic_isr()
634 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); in xiic_isr()
635 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_isr()
643 static void __xiic_start_xfer(struct xiic_i2c *i2c) in __xiic_start_xfer() argument
646 int fifo_space = xiic_tx_fifo_space(i2c); in __xiic_start_xfer()
647 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n", in __xiic_start_xfer()
648 __func__, i2c->tx_msg, fifo_space); in __xiic_start_xfer()
650 if (!i2c->tx_msg) in __xiic_start_xfer()
653 i2c->rx_pos = 0; in __xiic_start_xfer()
654 i2c->tx_pos = 0; in __xiic_start_xfer()
655 i2c->state = STATE_START; in __xiic_start_xfer()
656 while ((fifo_space >= 2) && (first || (i2c->nmsgs > 1))) { in __xiic_start_xfer()
658 i2c->nmsgs--; in __xiic_start_xfer()
659 i2c->tx_msg++; in __xiic_start_xfer()
660 i2c->tx_pos = 0; in __xiic_start_xfer()
664 if (i2c->tx_msg->flags & I2C_M_RD) { in __xiic_start_xfer()
666 xiic_start_recv(i2c); in __xiic_start_xfer()
669 xiic_start_send(i2c); in __xiic_start_xfer()
670 if (xiic_tx_space(i2c) != 0) { in __xiic_start_xfer()
676 fifo_space = xiic_tx_fifo_space(i2c); in __xiic_start_xfer()
682 if (i2c->nmsgs > 1 || xiic_tx_space(i2c)) in __xiic_start_xfer()
683 xiic_irq_clr_en(i2c, XIIC_INTR_TX_HALF_MASK); in __xiic_start_xfer()
687 static int xiic_start_xfer(struct xiic_i2c *i2c) in xiic_start_xfer() argument
690 mutex_lock(&i2c->lock); in xiic_start_xfer()
692 ret = xiic_reinit(i2c); in xiic_start_xfer()
694 __xiic_start_xfer(i2c); in xiic_start_xfer()
696 mutex_unlock(&i2c->lock); in xiic_start_xfer()
703 struct xiic_i2c *i2c = i2c_get_adapdata(adap); in xiic_xfer() local
707 xiic_getreg8(i2c, XIIC_SR_REG_OFFSET)); in xiic_xfer()
709 err = pm_runtime_get_sync(i2c->dev); in xiic_xfer()
713 err = xiic_busy(i2c); in xiic_xfer()
717 i2c->tx_msg = msgs; in xiic_xfer()
718 i2c->nmsgs = num; in xiic_xfer()
720 err = xiic_start_xfer(i2c); in xiic_xfer()
726 if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) || in xiic_xfer()
727 (i2c->state == STATE_DONE), HZ)) { in xiic_xfer()
728 err = (i2c->state == STATE_DONE) ? num : -EIO; in xiic_xfer()
731 i2c->tx_msg = NULL; in xiic_xfer()
732 i2c->rx_msg = NULL; in xiic_xfer()
733 i2c->nmsgs = 0; in xiic_xfer()
738 pm_runtime_mark_last_busy(i2c->dev); in xiic_xfer()
739 pm_runtime_put_autosuspend(i2c->dev); in xiic_xfer()
768 struct xiic_i2c *i2c; in xiic_i2c_probe() local
775 i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); in xiic_i2c_probe()
776 if (!i2c) in xiic_i2c_probe()
780 i2c->base = devm_ioremap_resource(&pdev->dev, res); in xiic_i2c_probe()
781 if (IS_ERR(i2c->base)) in xiic_i2c_probe()
782 return PTR_ERR(i2c->base); in xiic_i2c_probe()
791 platform_set_drvdata(pdev, i2c); in xiic_i2c_probe()
792 i2c->adap = xiic_adapter; in xiic_i2c_probe()
793 i2c_set_adapdata(&i2c->adap, i2c); in xiic_i2c_probe()
794 i2c->adap.dev.parent = &pdev->dev; in xiic_i2c_probe()
795 i2c->adap.dev.of_node = pdev->dev.of_node; in xiic_i2c_probe()
797 mutex_init(&i2c->lock); in xiic_i2c_probe()
798 init_waitqueue_head(&i2c->wait); in xiic_i2c_probe()
800 i2c->clk = devm_clk_get(&pdev->dev, NULL); in xiic_i2c_probe()
801 if (IS_ERR(i2c->clk)) { in xiic_i2c_probe()
802 if (PTR_ERR(i2c->clk) != -EPROBE_DEFER) in xiic_i2c_probe()
804 return PTR_ERR(i2c->clk); in xiic_i2c_probe()
806 ret = clk_prepare_enable(i2c->clk); in xiic_i2c_probe()
811 i2c->dev = &pdev->dev; in xiic_i2c_probe()
812 pm_runtime_set_autosuspend_delay(i2c->dev, XIIC_PM_TIMEOUT); in xiic_i2c_probe()
813 pm_runtime_use_autosuspend(i2c->dev); in xiic_i2c_probe()
814 pm_runtime_set_active(i2c->dev); in xiic_i2c_probe()
815 pm_runtime_enable(i2c->dev); in xiic_i2c_probe()
818 pdev->name, i2c); in xiic_i2c_probe()
825 i2c->singlemaster = in xiic_i2c_probe()
833 i2c->endianness = LITTLE; in xiic_i2c_probe()
834 xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); in xiic_i2c_probe()
836 sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); in xiic_i2c_probe()
838 i2c->endianness = BIG; in xiic_i2c_probe()
840 ret = xiic_reinit(i2c); in xiic_i2c_probe()
846 /* add i2c adapter to i2c tree */ in xiic_i2c_probe()
847 ret = i2c_add_adapter(&i2c->adap); in xiic_i2c_probe()
849 xiic_deinit(i2c); in xiic_i2c_probe()
856 i2c_new_client_device(&i2c->adap, pdata->devices + i); in xiic_i2c_probe()
864 clk_disable_unprepare(i2c->clk); in xiic_i2c_probe()
870 struct xiic_i2c *i2c = platform_get_drvdata(pdev); in xiic_i2c_remove() local
874 i2c_del_adapter(&i2c->adap); in xiic_i2c_remove()
876 ret = pm_runtime_get_sync(i2c->dev); in xiic_i2c_remove()
880 xiic_deinit(i2c); in xiic_i2c_remove()
881 pm_runtime_put_sync(i2c->dev); in xiic_i2c_remove()
882 clk_disable_unprepare(i2c->clk); in xiic_i2c_remove()
900 struct xiic_i2c *i2c = dev_get_drvdata(dev); in xiic_i2c_runtime_suspend() local
902 clk_disable(i2c->clk); in xiic_i2c_runtime_suspend()
909 struct xiic_i2c *i2c = dev_get_drvdata(dev); in xiic_i2c_runtime_resume() local
912 ret = clk_enable(i2c->clk); in xiic_i2c_runtime_resume()
938 MODULE_DESCRIPTION("Xilinx I2C bus driver");