Lines Matching refs:i2c_dev
297 static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, in dvc_writel() argument
300 writel_relaxed(val, i2c_dev->base + reg); in dvc_writel()
303 static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in dvc_readl() argument
305 return readl_relaxed(i2c_dev->base + reg); in dvc_readl()
312 static u32 tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in tegra_i2c_reg_addr() argument
314 if (i2c_dev->is_dvc) in tegra_i2c_reg_addr()
316 else if (i2c_dev->is_vi) in tegra_i2c_reg_addr()
322 static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned int reg) in i2c_writel() argument
324 writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
328 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
331 static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in i2c_readl() argument
333 return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_readl()
336 static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_writesl() argument
339 writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_writesl()
342 static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_readsl() argument
345 readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_readsl()
348 static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_mask_irq() argument
352 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) & ~mask; in tegra_i2c_mask_irq()
353 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_mask_irq()
356 static void tegra_i2c_unmask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_unmask_irq() argument
360 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) | mask; in tegra_i2c_unmask_irq()
361 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_unmask_irq()
366 struct tegra_i2c_dev *i2c_dev = args; in tegra_i2c_dma_complete() local
368 complete(&i2c_dev->dma_complete); in tegra_i2c_dma_complete()
371 static int tegra_i2c_dma_submit(struct tegra_i2c_dev *i2c_dev, size_t len) in tegra_i2c_dma_submit() argument
377 dev_dbg(i2c_dev->dev, "starting DMA for length: %zu\n", len); in tegra_i2c_dma_submit()
379 reinit_completion(&i2c_dev->dma_complete); in tegra_i2c_dma_submit()
381 dir = i2c_dev->msg_read ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; in tegra_i2c_dma_submit()
382 chan = i2c_dev->msg_read ? i2c_dev->rx_dma_chan : i2c_dev->tx_dma_chan; in tegra_i2c_dma_submit()
384 dma_desc = dmaengine_prep_slave_single(chan, i2c_dev->dma_phys, in tegra_i2c_dma_submit()
388 dev_err(i2c_dev->dev, "failed to get %s DMA descriptor\n", in tegra_i2c_dma_submit()
389 i2c_dev->msg_read ? "RX" : "TX"); in tegra_i2c_dma_submit()
394 dma_desc->callback_param = i2c_dev; in tegra_i2c_dma_submit()
402 static void tegra_i2c_release_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_dma() argument
404 if (i2c_dev->dma_buf) { in tegra_i2c_release_dma()
405 dma_free_coherent(i2c_dev->dev, i2c_dev->dma_buf_size, in tegra_i2c_release_dma()
406 i2c_dev->dma_buf, i2c_dev->dma_phys); in tegra_i2c_release_dma()
407 i2c_dev->dma_buf = NULL; in tegra_i2c_release_dma()
410 if (i2c_dev->tx_dma_chan) { in tegra_i2c_release_dma()
411 dma_release_channel(i2c_dev->tx_dma_chan); in tegra_i2c_release_dma()
412 i2c_dev->tx_dma_chan = NULL; in tegra_i2c_release_dma()
415 if (i2c_dev->rx_dma_chan) { in tegra_i2c_release_dma()
416 dma_release_channel(i2c_dev->rx_dma_chan); in tegra_i2c_release_dma()
417 i2c_dev->rx_dma_chan = NULL; in tegra_i2c_release_dma()
421 static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_dma() argument
428 if (!i2c_dev->hw->has_apb_dma || i2c_dev->is_vi) in tegra_i2c_init_dma()
432 dev_dbg(i2c_dev->dev, "DMA support not enabled\n"); in tegra_i2c_init_dma()
436 chan = dma_request_chan(i2c_dev->dev, "rx"); in tegra_i2c_init_dma()
442 i2c_dev->rx_dma_chan = chan; in tegra_i2c_init_dma()
444 chan = dma_request_chan(i2c_dev->dev, "tx"); in tegra_i2c_init_dma()
450 i2c_dev->tx_dma_chan = chan; in tegra_i2c_init_dma()
452 i2c_dev->dma_buf_size = i2c_dev->hw->quirks->max_write_len + in tegra_i2c_init_dma()
455 dma_buf = dma_alloc_coherent(i2c_dev->dev, i2c_dev->dma_buf_size, in tegra_i2c_init_dma()
458 dev_err(i2c_dev->dev, "failed to allocate DMA buffer\n"); in tegra_i2c_init_dma()
463 i2c_dev->dma_buf = dma_buf; in tegra_i2c_init_dma()
464 i2c_dev->dma_phys = dma_phys; in tegra_i2c_init_dma()
469 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_init_dma()
471 dev_err(i2c_dev->dev, "cannot use DMA: %d\n", err); in tegra_i2c_init_dma()
472 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_init_dma()
486 static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev) in tegra_dvc_init() argument
490 val = dvc_readl(i2c_dev, DVC_CTRL_REG3); in tegra_dvc_init()
493 dvc_writel(i2c_dev, val, DVC_CTRL_REG3); in tegra_dvc_init()
495 val = dvc_readl(i2c_dev, DVC_CTRL_REG1); in tegra_dvc_init()
497 dvc_writel(i2c_dev, val, DVC_CTRL_REG1); in tegra_dvc_init()
500 static void tegra_i2c_vi_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_vi_init() argument
506 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
512 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
516 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
521 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
524 i2c_writel(i2c_dev, value, I2C_BUS_CLEAR_CNFG); in tegra_i2c_vi_init()
526 i2c_writel(i2c_dev, 0x0, I2C_TLOW_SEXT); in tegra_i2c_vi_init()
529 static int tegra_i2c_poll_register(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_register() argument
533 void __iomem *addr = i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg); in tegra_i2c_poll_register()
536 if (!i2c_dev->atomic_mode) in tegra_i2c_poll_register()
544 static int tegra_i2c_flush_fifos(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_flush_fifos() argument
549 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_flush_fifos()
559 val = i2c_readl(i2c_dev, offset); in tegra_i2c_flush_fifos()
561 i2c_writel(i2c_dev, val, offset); in tegra_i2c_flush_fifos()
563 err = tegra_i2c_poll_register(i2c_dev, offset, mask, 1000, 1000000); in tegra_i2c_flush_fifos()
565 dev_err(i2c_dev->dev, "failed to flush FIFO\n"); in tegra_i2c_flush_fifos()
572 static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_wait_for_config_load() argument
576 if (!i2c_dev->hw->has_config_load_reg) in tegra_i2c_wait_for_config_load()
579 i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); in tegra_i2c_wait_for_config_load()
581 err = tegra_i2c_poll_register(i2c_dev, I2C_CONFIG_LOAD, 0xffffffff, in tegra_i2c_wait_for_config_load()
584 dev_err(i2c_dev->dev, "failed to load config\n"); in tegra_i2c_wait_for_config_load()
591 static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init() argument
604 err = reset_control_reset(i2c_dev->rst); in tegra_i2c_init()
607 if (i2c_dev->is_dvc) in tegra_i2c_init()
608 tegra_dvc_init(i2c_dev); in tegra_i2c_init()
613 if (i2c_dev->hw->has_multi_master_mode) in tegra_i2c_init()
616 i2c_writel(i2c_dev, val, I2C_CNFG); in tegra_i2c_init()
617 i2c_writel(i2c_dev, 0, I2C_INT_MASK); in tegra_i2c_init()
619 if (i2c_dev->is_vi) in tegra_i2c_init()
620 tegra_i2c_vi_init(i2c_dev); in tegra_i2c_init()
622 switch (i2c_dev->bus_clk_rate) { in tegra_i2c_init()
625 tlow = i2c_dev->hw->tlow_fast_fastplus_mode; in tegra_i2c_init()
626 thigh = i2c_dev->hw->thigh_fast_fastplus_mode; in tegra_i2c_init()
627 tsu_thd = i2c_dev->hw->setup_hold_time_fast_fast_plus_mode; in tegra_i2c_init()
629 if (i2c_dev->bus_clk_rate > I2C_MAX_FAST_MODE_FREQ) in tegra_i2c_init()
630 non_hs_mode = i2c_dev->hw->clk_divisor_fast_plus_mode; in tegra_i2c_init()
632 non_hs_mode = i2c_dev->hw->clk_divisor_fast_mode; in tegra_i2c_init()
636 tlow = i2c_dev->hw->tlow_std_mode; in tegra_i2c_init()
637 thigh = i2c_dev->hw->thigh_std_mode; in tegra_i2c_init()
638 tsu_thd = i2c_dev->hw->setup_hold_time_std_mode; in tegra_i2c_init()
639 non_hs_mode = i2c_dev->hw->clk_divisor_std_mode; in tegra_i2c_init()
645 i2c_dev->hw->clk_divisor_hs_mode) | in tegra_i2c_init()
647 i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR); in tegra_i2c_init()
649 if (i2c_dev->hw->has_interface_timing_reg) { in tegra_i2c_init()
652 i2c_writel(i2c_dev, val, I2C_INTERFACE_TIMING_0); in tegra_i2c_init()
659 if (i2c_dev->hw->has_interface_timing_reg && tsu_thd) in tegra_i2c_init()
660 i2c_writel(i2c_dev, tsu_thd, I2C_INTERFACE_TIMING_1); in tegra_i2c_init()
664 err = clk_set_rate(i2c_dev->div_clk, in tegra_i2c_init()
665 i2c_dev->bus_clk_rate * clk_multiplier); in tegra_i2c_init()
667 dev_err(i2c_dev->dev, "failed to set div-clk rate: %d\n", err); in tegra_i2c_init()
671 if (!i2c_dev->is_dvc && !i2c_dev->is_vi) { in tegra_i2c_init()
672 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG); in tegra_i2c_init()
675 i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG); in tegra_i2c_init()
676 i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1); in tegra_i2c_init()
677 i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2); in tegra_i2c_init()
680 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_init()
684 if (i2c_dev->multimaster_mode && i2c_dev->hw->has_slcg_override_reg) in tegra_i2c_init()
685 i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE); in tegra_i2c_init()
687 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_init()
694 static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_disable_packet_mode() argument
704 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); in tegra_i2c_disable_packet_mode()
706 cnfg = i2c_readl(i2c_dev, I2C_CNFG); in tegra_i2c_disable_packet_mode()
708 i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG); in tegra_i2c_disable_packet_mode()
710 return tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_disable_packet_mode()
713 static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_empty_rx_fifo() argument
715 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_empty_rx_fifo()
717 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_empty_rx_fifo()
724 if (WARN_ON_ONCE(!(i2c_dev->msg_buf_remaining))) in tegra_i2c_empty_rx_fifo()
727 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_empty_rx_fifo()
728 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
731 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
740 i2c_readsl(i2c_dev, buf, I2C_RX_FIFO, words_to_transfer); in tegra_i2c_empty_rx_fifo()
756 val = i2c_readl(i2c_dev, I2C_RX_FIFO); in tegra_i2c_empty_rx_fifo()
767 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_empty_rx_fifo()
768 i2c_dev->msg_buf = buf; in tegra_i2c_empty_rx_fifo()
773 static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_fill_tx_fifo() argument
775 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_fill_tx_fifo()
777 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_fill_tx_fifo()
780 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_fill_tx_fifo()
781 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
784 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
811 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_fill_tx_fifo()
812 i2c_dev->msg_buf = buf + words_to_transfer * BYTES_PER_FIFO_WORD; in tegra_i2c_fill_tx_fifo()
814 i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); in tegra_i2c_fill_tx_fifo()
833 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_fill_tx_fifo()
834 i2c_dev->msg_buf = NULL; in tegra_i2c_fill_tx_fifo()
836 i2c_writel(i2c_dev, val, I2C_TX_FIFO); in tegra_i2c_fill_tx_fifo()
845 struct tegra_i2c_dev *i2c_dev = dev_id; in tegra_i2c_isr() local
848 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_isr()
851 dev_warn(i2c_dev->dev, "IRQ status 0 %08x %08x %08x\n", in tegra_i2c_isr()
852 i2c_readl(i2c_dev, I2C_PACKET_TRANSFER_STATUS), in tegra_i2c_isr()
853 i2c_readl(i2c_dev, I2C_STATUS), in tegra_i2c_isr()
854 i2c_readl(i2c_dev, I2C_CNFG)); in tegra_i2c_isr()
855 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
860 tegra_i2c_disable_packet_mode(i2c_dev); in tegra_i2c_isr()
862 i2c_dev->msg_err |= I2C_ERR_NO_ACK; in tegra_i2c_isr()
864 i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST; in tegra_i2c_isr()
872 if (i2c_dev->hw->supports_bus_clear && (status & I2C_INT_BUS_CLR_DONE)) in tegra_i2c_isr()
875 if (!i2c_dev->dma_mode) { in tegra_i2c_isr()
876 if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
877 if (tegra_i2c_empty_rx_fifo(i2c_dev)) { in tegra_i2c_isr()
883 i2c_dev->msg_err |= I2C_ERR_RX_BUFFER_OVERFLOW; in tegra_i2c_isr()
888 if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
889 if (i2c_dev->msg_buf_remaining) in tegra_i2c_isr()
890 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_isr()
892 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
897 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
898 if (i2c_dev->is_dvc) in tegra_i2c_isr()
899 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
910 if (i2c_dev->dma_mode) in tegra_i2c_isr()
911 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_isr()
916 if (WARN_ON_ONCE(i2c_dev->msg_buf_remaining)) { in tegra_i2c_isr()
917 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
920 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
925 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
932 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_isr()
933 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_isr()
935 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
937 if (i2c_dev->is_dvc) in tegra_i2c_isr()
938 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
940 if (i2c_dev->dma_mode) { in tegra_i2c_isr()
941 if (i2c_dev->msg_read) in tegra_i2c_isr()
942 dmaengine_terminate_async(i2c_dev->rx_dma_chan); in tegra_i2c_isr()
944 dmaengine_terminate_async(i2c_dev->tx_dma_chan); in tegra_i2c_isr()
946 complete(&i2c_dev->dma_complete); in tegra_i2c_isr()
949 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
954 static void tegra_i2c_config_fifo_trig(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_config_fifo_trig() argument
962 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
967 if (i2c_dev->dma_mode) { in tegra_i2c_config_fifo_trig()
975 if (i2c_dev->msg_read) { in tegra_i2c_config_fifo_trig()
976 chan = i2c_dev->rx_dma_chan; in tegra_i2c_config_fifo_trig()
977 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_RX_FIFO); in tegra_i2c_config_fifo_trig()
979 slv_config.src_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
983 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
988 chan = i2c_dev->tx_dma_chan; in tegra_i2c_config_fifo_trig()
989 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_TX_FIFO); in tegra_i2c_config_fifo_trig()
991 slv_config.dst_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
995 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1004 dev_err(i2c_dev->dev, "DMA config failed: %d\n", err); in tegra_i2c_config_fifo_trig()
1005 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_config_fifo_trig()
1007 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_config_fifo_trig()
1008 i2c_dev->dma_mode = false; in tegra_i2c_config_fifo_trig()
1014 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1021 i2c_writel(i2c_dev, val, reg); in tegra_i2c_config_fifo_trig()
1024 static unsigned long tegra_i2c_poll_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_completion() argument
1032 u32 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_poll_completion()
1035 tegra_i2c_isr(i2c_dev->irq, i2c_dev); in tegra_i2c_poll_completion()
1050 static unsigned long tegra_i2c_wait_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_wait_completion() argument
1056 if (i2c_dev->atomic_mode) { in tegra_i2c_wait_completion()
1057 ret = tegra_i2c_poll_completion(i2c_dev, complete, timeout_ms); in tegra_i2c_wait_completion()
1059 enable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1062 disable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1075 ret = tegra_i2c_poll_completion(i2c_dev, complete, 0); in tegra_i2c_wait_completion()
1083 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_issue_bus_clear() local
1087 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_issue_bus_clear()
1091 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1093 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_issue_bus_clear()
1098 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1099 tegra_i2c_unmask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1101 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, 50); in tegra_i2c_issue_bus_clear()
1102 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1105 dev_err(i2c_dev->dev, "failed to clear bus\n"); in tegra_i2c_issue_bus_clear()
1109 val = i2c_readl(i2c_dev, I2C_BUS_CLEAR_STATUS); in tegra_i2c_issue_bus_clear()
1111 dev_err(i2c_dev->dev, "un-recovered arbitration lost\n"); in tegra_i2c_issue_bus_clear()
1118 static void tegra_i2c_push_packet_header(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_push_packet_header() argument
1122 u32 *dma_buf = i2c_dev->dma_buf; in tegra_i2c_push_packet_header()
1128 FIELD_PREP(PACKET_HEADER0_CONT_ID, i2c_dev->cont_id) | in tegra_i2c_push_packet_header()
1131 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1134 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1138 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1141 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1163 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1166 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1169 static int tegra_i2c_error_recover(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_error_recover() argument
1172 if (i2c_dev->msg_err == I2C_ERR_NONE) in tegra_i2c_error_recover()
1175 tegra_i2c_init(i2c_dev); in tegra_i2c_error_recover()
1178 if (i2c_dev->msg_err == I2C_ERR_ARBITRATION_LOST) { in tegra_i2c_error_recover()
1179 if (!i2c_dev->multimaster_mode) in tegra_i2c_error_recover()
1180 return i2c_recover_bus(&i2c_dev->adapter); in tegra_i2c_error_recover()
1185 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) { in tegra_i2c_error_recover()
1195 static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_xfer_msg() argument
1204 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_xfer_msg()
1208 i2c_dev->msg_buf = msg->buf; in tegra_i2c_xfer_msg()
1209 i2c_dev->msg_buf_remaining = msg->len; in tegra_i2c_xfer_msg()
1210 i2c_dev->msg_err = I2C_ERR_NONE; in tegra_i2c_xfer_msg()
1211 i2c_dev->msg_read = !!(msg->flags & I2C_M_RD); in tegra_i2c_xfer_msg()
1212 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_xfer_msg()
1214 if (i2c_dev->msg_read) in tegra_i2c_xfer_msg()
1221 i2c_dev->dma_mode = xfer_size > I2C_PIO_MODE_PREFERRED_LEN && in tegra_i2c_xfer_msg()
1222 i2c_dev->dma_buf && !i2c_dev->atomic_mode; in tegra_i2c_xfer_msg()
1224 tegra_i2c_config_fifo_trig(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1231 i2c_dev->bus_clk_rate); in tegra_i2c_xfer_msg()
1234 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1236 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1237 if (i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1238 dma_sync_single_for_device(i2c_dev->dev, in tegra_i2c_xfer_msg()
1239 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1242 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1246 dma_sync_single_for_cpu(i2c_dev->dev, in tegra_i2c_xfer_msg()
1247 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1252 tegra_i2c_push_packet_header(i2c_dev, msg, end_state); in tegra_i2c_xfer_msg()
1254 if (!i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1255 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1256 memcpy(i2c_dev->dma_buf + I2C_PACKET_HEADER_SIZE, in tegra_i2c_xfer_msg()
1259 dma_sync_single_for_device(i2c_dev->dev, in tegra_i2c_xfer_msg()
1260 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1263 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1267 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_xfer_msg()
1271 if (i2c_dev->hw->has_per_pkt_xfer_complete_irq) in tegra_i2c_xfer_msg()
1274 if (!i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1277 else if (i2c_dev->msg_buf_remaining) in tegra_i2c_xfer_msg()
1281 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1282 dev_dbg(i2c_dev->dev, "unmasked IRQ: %02x\n", in tegra_i2c_xfer_msg()
1283 i2c_readl(i2c_dev, I2C_INT_MASK)); in tegra_i2c_xfer_msg()
1285 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1286 time_left = tegra_i2c_wait_completion(i2c_dev, in tegra_i2c_xfer_msg()
1287 &i2c_dev->dma_complete, in tegra_i2c_xfer_msg()
1295 dmaengine_synchronize(i2c_dev->msg_read ? in tegra_i2c_xfer_msg()
1296 i2c_dev->rx_dma_chan : in tegra_i2c_xfer_msg()
1297 i2c_dev->tx_dma_chan); in tegra_i2c_xfer_msg()
1299 dmaengine_terminate_sync(i2c_dev->msg_read ? in tegra_i2c_xfer_msg()
1300 i2c_dev->rx_dma_chan : in tegra_i2c_xfer_msg()
1301 i2c_dev->tx_dma_chan); in tegra_i2c_xfer_msg()
1303 if (!time_left && !completion_done(&i2c_dev->dma_complete)) { in tegra_i2c_xfer_msg()
1304 dev_err(i2c_dev->dev, "DMA transfer timed out\n"); in tegra_i2c_xfer_msg()
1305 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1309 if (i2c_dev->msg_read && i2c_dev->msg_err == I2C_ERR_NONE) { in tegra_i2c_xfer_msg()
1310 dma_sync_single_for_cpu(i2c_dev->dev, in tegra_i2c_xfer_msg()
1311 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1314 memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, msg->len); in tegra_i2c_xfer_msg()
1318 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, in tegra_i2c_xfer_msg()
1321 tegra_i2c_mask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1324 dev_err(i2c_dev->dev, "I2C transfer timed out\n"); in tegra_i2c_xfer_msg()
1325 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1329 dev_dbg(i2c_dev->dev, "transfer complete: %lu %d %d\n", in tegra_i2c_xfer_msg()
1330 time_left, completion_done(&i2c_dev->msg_complete), in tegra_i2c_xfer_msg()
1331 i2c_dev->msg_err); in tegra_i2c_xfer_msg()
1333 i2c_dev->dma_mode = false; in tegra_i2c_xfer_msg()
1335 err = tegra_i2c_error_recover(i2c_dev, msg); in tegra_i2c_xfer_msg()
1345 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer() local
1348 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_xfer()
1350 dev_err(i2c_dev->dev, "runtime resume failed %d\n", ret); in tegra_i2c_xfer()
1351 pm_runtime_put_noidle(i2c_dev->dev); in tegra_i2c_xfer()
1365 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type); in tegra_i2c_xfer()
1370 pm_runtime_put(i2c_dev->dev); in tegra_i2c_xfer()
1378 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer_atomic() local
1381 i2c_dev->atomic_mode = true; in tegra_i2c_xfer_atomic()
1383 i2c_dev->atomic_mode = false; in tegra_i2c_xfer_atomic()
1390 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_func() local
1394 if (i2c_dev->hw->has_continue_xfer_support) in tegra_i2c_func()
1604 static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_parse_dt() argument
1606 struct device_node *np = i2c_dev->dev->of_node; in tegra_i2c_parse_dt()
1611 &i2c_dev->bus_clk_rate); in tegra_i2c_parse_dt()
1613 i2c_dev->bus_clk_rate = I2C_MAX_STANDARD_MODE_FREQ; in tegra_i2c_parse_dt()
1616 i2c_dev->multimaster_mode = multi_mode; in tegra_i2c_parse_dt()
1619 i2c_dev->is_dvc = true; in tegra_i2c_parse_dt()
1622 i2c_dev->is_vi = true; in tegra_i2c_parse_dt()
1625 static int tegra_i2c_init_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_clocks() argument
1629 i2c_dev->clocks[i2c_dev->nclocks++].id = "div-clk"; in tegra_i2c_init_clocks()
1631 if (i2c_dev->hw == &tegra20_i2c_hw || i2c_dev->hw == &tegra30_i2c_hw) in tegra_i2c_init_clocks()
1632 i2c_dev->clocks[i2c_dev->nclocks++].id = "fast-clk"; in tegra_i2c_init_clocks()
1634 if (i2c_dev->is_vi) in tegra_i2c_init_clocks()
1635 i2c_dev->clocks[i2c_dev->nclocks++].id = "slow"; in tegra_i2c_init_clocks()
1637 err = devm_clk_bulk_get(i2c_dev->dev, i2c_dev->nclocks, in tegra_i2c_init_clocks()
1638 i2c_dev->clocks); in tegra_i2c_init_clocks()
1642 err = clk_bulk_prepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1646 i2c_dev->div_clk = i2c_dev->clocks[0].clk; in tegra_i2c_init_clocks()
1648 if (!i2c_dev->multimaster_mode) in tegra_i2c_init_clocks()
1651 err = clk_enable(i2c_dev->div_clk); in tegra_i2c_init_clocks()
1653 dev_err(i2c_dev->dev, "failed to enable div-clk: %d\n", err); in tegra_i2c_init_clocks()
1660 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1665 static void tegra_i2c_release_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_clocks() argument
1667 if (i2c_dev->multimaster_mode) in tegra_i2c_release_clocks()
1668 clk_disable(i2c_dev->div_clk); in tegra_i2c_release_clocks()
1670 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_release_clocks()
1673 static int tegra_i2c_init_hardware(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_hardware() argument
1677 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_init_hardware()
1679 dev_err(i2c_dev->dev, "runtime resume failed: %d\n", ret); in tegra_i2c_init_hardware()
1681 ret = tegra_i2c_init(i2c_dev); in tegra_i2c_init_hardware()
1683 pm_runtime_put(i2c_dev->dev); in tegra_i2c_init_hardware()
1690 struct tegra_i2c_dev *i2c_dev; in tegra_i2c_probe() local
1694 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in tegra_i2c_probe()
1695 if (!i2c_dev) in tegra_i2c_probe()
1698 platform_set_drvdata(pdev, i2c_dev); in tegra_i2c_probe()
1700 init_completion(&i2c_dev->msg_complete); in tegra_i2c_probe()
1701 init_completion(&i2c_dev->dma_complete); in tegra_i2c_probe()
1703 i2c_dev->hw = of_device_get_match_data(&pdev->dev); in tegra_i2c_probe()
1704 i2c_dev->cont_id = pdev->id; in tegra_i2c_probe()
1705 i2c_dev->dev = &pdev->dev; in tegra_i2c_probe()
1707 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in tegra_i2c_probe()
1708 if (IS_ERR(i2c_dev->base)) in tegra_i2c_probe()
1709 return PTR_ERR(i2c_dev->base); in tegra_i2c_probe()
1711 i2c_dev->base_phys = res->start; in tegra_i2c_probe()
1717 i2c_dev->irq = err; in tegra_i2c_probe()
1720 irq_set_status_flags(i2c_dev->irq, IRQ_NOAUTOEN); in tegra_i2c_probe()
1722 err = devm_request_irq(i2c_dev->dev, i2c_dev->irq, tegra_i2c_isr, in tegra_i2c_probe()
1723 IRQF_NO_SUSPEND, dev_name(i2c_dev->dev), in tegra_i2c_probe()
1724 i2c_dev); in tegra_i2c_probe()
1728 i2c_dev->rst = devm_reset_control_get_exclusive(i2c_dev->dev, "i2c"); in tegra_i2c_probe()
1729 if (IS_ERR(i2c_dev->rst)) { in tegra_i2c_probe()
1730 dev_err_probe(i2c_dev->dev, PTR_ERR(i2c_dev->rst), in tegra_i2c_probe()
1732 return PTR_ERR(i2c_dev->rst); in tegra_i2c_probe()
1735 tegra_i2c_parse_dt(i2c_dev); in tegra_i2c_probe()
1737 err = tegra_i2c_init_clocks(i2c_dev); in tegra_i2c_probe()
1741 err = tegra_i2c_init_dma(i2c_dev); in tegra_i2c_probe()
1754 if (!i2c_dev->is_vi) in tegra_i2c_probe()
1755 pm_runtime_irq_safe(i2c_dev->dev); in tegra_i2c_probe()
1757 pm_runtime_enable(i2c_dev->dev); in tegra_i2c_probe()
1759 err = tegra_i2c_init_hardware(i2c_dev); in tegra_i2c_probe()
1763 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev); in tegra_i2c_probe()
1764 i2c_dev->adapter.dev.of_node = i2c_dev->dev->of_node; in tegra_i2c_probe()
1765 i2c_dev->adapter.dev.parent = i2c_dev->dev; in tegra_i2c_probe()
1766 i2c_dev->adapter.retries = 1; in tegra_i2c_probe()
1767 i2c_dev->adapter.timeout = 6 * HZ; in tegra_i2c_probe()
1768 i2c_dev->adapter.quirks = i2c_dev->hw->quirks; in tegra_i2c_probe()
1769 i2c_dev->adapter.owner = THIS_MODULE; in tegra_i2c_probe()
1770 i2c_dev->adapter.class = I2C_CLASS_DEPRECATED; in tegra_i2c_probe()
1771 i2c_dev->adapter.algo = &tegra_i2c_algo; in tegra_i2c_probe()
1772 i2c_dev->adapter.nr = pdev->id; in tegra_i2c_probe()
1774 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_probe()
1775 i2c_dev->adapter.bus_recovery_info = &tegra_i2c_recovery_info; in tegra_i2c_probe()
1777 strlcpy(i2c_dev->adapter.name, dev_name(i2c_dev->dev), in tegra_i2c_probe()
1778 sizeof(i2c_dev->adapter.name)); in tegra_i2c_probe()
1780 err = i2c_add_numbered_adapter(&i2c_dev->adapter); in tegra_i2c_probe()
1787 pm_runtime_disable(i2c_dev->dev); in tegra_i2c_probe()
1789 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_probe()
1791 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_probe()
1798 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev); in tegra_i2c_remove() local
1800 i2c_del_adapter(&i2c_dev->adapter); in tegra_i2c_remove()
1801 pm_runtime_disable(i2c_dev->dev); in tegra_i2c_remove()
1803 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_remove()
1804 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_remove()
1811 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_resume() local
1818 err = clk_bulk_enable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1827 if (i2c_dev->is_vi) { in tegra_i2c_runtime_resume()
1828 err = tegra_i2c_init(i2c_dev); in tegra_i2c_runtime_resume()
1836 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1843 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_suspend() local
1845 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_suspend()
1852 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_suspend() local
1855 i2c_mark_adapter_suspended(&i2c_dev->adapter); in tegra_i2c_suspend()
1868 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_resume() local
1879 err = tegra_i2c_init(i2c_dev); in tegra_i2c_resume()
1894 i2c_mark_adapter_resumed(&i2c_dev->adapter); in tegra_i2c_resume()