Lines Matching +full:clock +full:- +full:presc
1 // SPDX-License-Identifier: GPL-2.0
14 * This driver is based on i2c-stm32f4.c
21 #include <linux/i2c-smbus.h>
38 #include "i2c-stm32.h"
181 * struct stm32f7_i2c_regs - i2c f7 registers backup
197 * struct stm32f7_i2c_spec - private i2c specification timing
204 * @l_min: Min low period of the SCL clock (ns)
205 * @h_min: Min high period of the SCL clock (ns)
219 * struct stm32f7_i2c_setup - private I2C timing setup parameters
221 * @clock_src: I2C clock source frequency (Hz)
224 * @dnf: Digital filter coefficient (0-16)
239 * struct stm32f7_i2c_timings - private I2C output parameters
241 * @presc: Prescaler value
249 u8 presc; member
257 * struct stm32f7_i2c_msg - client specific data
258 * @addr: 8-bit or 10-bit slave addr, including r/w bit
266 * SMBus block read and SMBus block write - block read process call protocols
269 * This buffer has to be 32-bit aligned to be compliant with memory address
285 * struct stm32f7_i2c_dev - private data of the controller
290 * @clk: hw i2c clock
291 * @bus_rate: I2C clock frequency of the controller
312 * @host_notify_client: SMBus host-notify client
348 * and Fast-mode Plus I2C-bus devices
410 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, mask); in stm32f7_i2c_disable_irq()
421 return ERR_PTR(-EINVAL); in stm32f7_get_specs()
432 setup->clock_src); in stm32f7_i2c_compute_timing()
434 setup->speed_freq); in stm32f7_i2c_compute_timing()
447 specs = stm32f7_get_specs(setup->speed_freq); in stm32f7_i2c_compute_timing()
448 if (specs == ERR_PTR(-EINVAL)) { in stm32f7_i2c_compute_timing()
449 dev_err(i2c_dev->dev, "speed out of bound {%d}\n", in stm32f7_i2c_compute_timing()
450 setup->speed_freq); in stm32f7_i2c_compute_timing()
451 return -EINVAL; in stm32f7_i2c_compute_timing()
454 if ((setup->rise_time > specs->rise_max) || in stm32f7_i2c_compute_timing()
455 (setup->fall_time > specs->fall_max)) { in stm32f7_i2c_compute_timing()
456 dev_err(i2c_dev->dev, in stm32f7_i2c_compute_timing()
458 setup->rise_time, specs->rise_max, in stm32f7_i2c_compute_timing()
459 setup->fall_time, specs->fall_max); in stm32f7_i2c_compute_timing()
460 return -EINVAL; in stm32f7_i2c_compute_timing()
463 if (setup->dnf > STM32F7_I2C_DNF_MAX) { in stm32f7_i2c_compute_timing()
464 dev_err(i2c_dev->dev, in stm32f7_i2c_compute_timing()
466 setup->dnf, STM32F7_I2C_DNF_MAX); in stm32f7_i2c_compute_timing()
467 return -EINVAL; in stm32f7_i2c_compute_timing()
472 (setup->analog_filter ? in stm32f7_i2c_compute_timing()
475 (setup->analog_filter ? in stm32f7_i2c_compute_timing()
477 dnf_delay = setup->dnf * i2cclk; in stm32f7_i2c_compute_timing()
479 sdadel_min = specs->hddat_min + setup->fall_time - in stm32f7_i2c_compute_timing()
480 af_delay_min - (setup->dnf + 3) * i2cclk; in stm32f7_i2c_compute_timing()
482 sdadel_max = specs->vddat_max - setup->rise_time - in stm32f7_i2c_compute_timing()
483 af_delay_max - (setup->dnf + 4) * i2cclk; in stm32f7_i2c_compute_timing()
485 scldel_min = setup->rise_time + specs->sudat_min; in stm32f7_i2c_compute_timing()
492 dev_dbg(i2c_dev->dev, "SDADEL(min/max): %i/%i, SCLDEL(Min): %i\n", in stm32f7_i2c_compute_timing()
496 /* Compute possible values for PRESC, SCLDEL and SDADEL */ in stm32f7_i2c_compute_timing()
512 ret = -ENOMEM; in stm32f7_i2c_compute_timing()
516 v->presc = p; in stm32f7_i2c_compute_timing()
517 v->scldel = l; in stm32f7_i2c_compute_timing()
518 v->sdadel = a; in stm32f7_i2c_compute_timing()
521 list_add_tail(&v->node, in stm32f7_i2c_compute_timing()
533 dev_err(i2c_dev->dev, "no Prescaler solution\n"); in stm32f7_i2c_compute_timing()
534 ret = -EPERM; in stm32f7_i2c_compute_timing()
540 clk_max = NSEC_PER_SEC / RATE_MIN(setup->speed_freq); in stm32f7_i2c_compute_timing()
541 clk_min = NSEC_PER_SEC / setup->speed_freq; in stm32f7_i2c_compute_timing()
546 * - SCL Low Period has to be higher than SCL Clock Low Period in stm32f7_i2c_compute_timing()
547 * defined by I2C Specification. I2C Clock has to be lower than in stm32f7_i2c_compute_timing()
548 * (SCL Low Period - Analog/Digital filters) / 4. in stm32f7_i2c_compute_timing()
549 * - SCL High Period has to be lower than SCL Clock High Period in stm32f7_i2c_compute_timing()
551 * - I2C Clock has to be lower than SCL High Period in stm32f7_i2c_compute_timing()
554 u32 prescaler = (v->presc + 1) * i2cclk; in stm32f7_i2c_compute_timing()
559 if ((tscl_l < specs->l_min) || in stm32f7_i2c_compute_timing()
561 ((tscl_l - af_delay_min - dnf_delay) / 4))) { in stm32f7_i2c_compute_timing()
568 setup->rise_time + setup->fall_time; in stm32f7_i2c_compute_timing()
571 (tscl_h >= specs->h_min) && in stm32f7_i2c_compute_timing()
573 int clk_error = tscl - i2cbus; in stm32f7_i2c_compute_timing()
576 clk_error = -clk_error; in stm32f7_i2c_compute_timing()
580 v->scll = l; in stm32f7_i2c_compute_timing()
581 v->sclh = h; in stm32f7_i2c_compute_timing()
590 dev_err(i2c_dev->dev, "no solution at all\n"); in stm32f7_i2c_compute_timing()
591 ret = -EPERM; in stm32f7_i2c_compute_timing()
595 output->presc = s->presc; in stm32f7_i2c_compute_timing()
596 output->scldel = s->scldel; in stm32f7_i2c_compute_timing()
597 output->sdadel = s->sdadel; in stm32f7_i2c_compute_timing()
598 output->scll = s->scll; in stm32f7_i2c_compute_timing()
599 output->sclh = s->sclh; in stm32f7_i2c_compute_timing()
601 dev_dbg(i2c_dev->dev, in stm32f7_i2c_compute_timing()
602 "Presc: %i, scldel: %i, sdadel: %i, scll: %i, sclh: %i\n", in stm32f7_i2c_compute_timing()
603 output->presc, in stm32f7_i2c_compute_timing()
604 output->scldel, output->sdadel, in stm32f7_i2c_compute_timing()
605 output->scll, output->sclh); in stm32f7_i2c_compute_timing()
610 list_del(&v->node); in stm32f7_i2c_compute_timing()
621 while (--i) in stm32f7_get_lower_rate()
634 t->bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; in stm32f7_i2c_setup_timing()
635 t->scl_rise_ns = i2c_dev->setup.rise_time; in stm32f7_i2c_setup_timing()
636 t->scl_fall_ns = i2c_dev->setup.fall_time; in stm32f7_i2c_setup_timing()
638 i2c_parse_fw_timings(i2c_dev->dev, t, false); in stm32f7_i2c_setup_timing()
640 if (t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ) { in stm32f7_i2c_setup_timing()
641 dev_err(i2c_dev->dev, "Invalid bus speed (%i>%i)\n", in stm32f7_i2c_setup_timing()
642 t->bus_freq_hz, I2C_MAX_FAST_MODE_PLUS_FREQ); in stm32f7_i2c_setup_timing()
643 return -EINVAL; in stm32f7_i2c_setup_timing()
646 setup->speed_freq = t->bus_freq_hz; in stm32f7_i2c_setup_timing()
647 i2c_dev->setup.rise_time = t->scl_rise_ns; in stm32f7_i2c_setup_timing()
648 i2c_dev->setup.fall_time = t->scl_fall_ns; in stm32f7_i2c_setup_timing()
649 setup->clock_src = clk_get_rate(i2c_dev->clk); in stm32f7_i2c_setup_timing()
651 if (!setup->clock_src) { in stm32f7_i2c_setup_timing()
652 dev_err(i2c_dev->dev, "clock rate is 0\n"); in stm32f7_i2c_setup_timing()
653 return -EINVAL; in stm32f7_i2c_setup_timing()
658 &i2c_dev->timing); in stm32f7_i2c_setup_timing()
660 dev_err(i2c_dev->dev, in stm32f7_i2c_setup_timing()
662 if (setup->speed_freq <= I2C_MAX_STANDARD_MODE_FREQ) in stm32f7_i2c_setup_timing()
664 setup->speed_freq = in stm32f7_i2c_setup_timing()
665 stm32f7_get_lower_rate(setup->speed_freq); in stm32f7_i2c_setup_timing()
666 dev_warn(i2c_dev->dev, in stm32f7_i2c_setup_timing()
668 setup->speed_freq); in stm32f7_i2c_setup_timing()
673 dev_err(i2c_dev->dev, "Impossible to compute I2C timings.\n"); in stm32f7_i2c_setup_timing()
677 dev_dbg(i2c_dev->dev, "I2C Speed(%i), Clk Source(%i)\n", in stm32f7_i2c_setup_timing()
678 setup->speed_freq, setup->clock_src); in stm32f7_i2c_setup_timing()
679 dev_dbg(i2c_dev->dev, "I2C Rise(%i) and Fall(%i) Time\n", in stm32f7_i2c_setup_timing()
680 setup->rise_time, setup->fall_time); in stm32f7_i2c_setup_timing()
681 dev_dbg(i2c_dev->dev, "I2C Analog Filter(%s), DNF(%i)\n", in stm32f7_i2c_setup_timing()
682 (setup->analog_filter ? "On" : "Off"), setup->dnf); in stm32f7_i2c_setup_timing()
684 i2c_dev->bus_rate = setup->speed_freq; in stm32f7_i2c_setup_timing()
691 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_dma_req()
700 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_dma_callback()
701 struct device *dev = dma->chan_using->device->dev; in stm32f7_i2c_dma_callback()
704 dma_unmap_single(dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); in stm32f7_i2c_dma_callback()
705 complete(&dma->dma_complete); in stm32f7_i2c_dma_callback()
710 struct stm32f7_i2c_timings *t = &i2c_dev->timing; in stm32f7_i2c_hw_config()
714 timing |= STM32F7_I2C_TIMINGR_PRESC(t->presc); in stm32f7_i2c_hw_config()
715 timing |= STM32F7_I2C_TIMINGR_SCLDEL(t->scldel); in stm32f7_i2c_hw_config()
716 timing |= STM32F7_I2C_TIMINGR_SDADEL(t->sdadel); in stm32f7_i2c_hw_config()
717 timing |= STM32F7_I2C_TIMINGR_SCLH(t->sclh); in stm32f7_i2c_hw_config()
718 timing |= STM32F7_I2C_TIMINGR_SCLL(t->scll); in stm32f7_i2c_hw_config()
719 writel_relaxed(timing, i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_hw_config()
722 if (i2c_dev->setup.analog_filter) in stm32f7_i2c_hw_config()
723 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
726 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
728 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
734 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_write_tx_data()
735 void __iomem *base = i2c_dev->base; in stm32f7_i2c_write_tx_data()
737 if (f7_msg->count) { in stm32f7_i2c_write_tx_data()
738 writeb_relaxed(*f7_msg->buf++, base + STM32F7_I2C_TXDR); in stm32f7_i2c_write_tx_data()
739 f7_msg->count--; in stm32f7_i2c_write_tx_data()
745 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_read_rx_data()
746 void __iomem *base = i2c_dev->base; in stm32f7_i2c_read_rx_data()
748 if (f7_msg->count) { in stm32f7_i2c_read_rx_data()
749 *f7_msg->buf++ = readb_relaxed(base + STM32F7_I2C_RXDR); in stm32f7_i2c_read_rx_data()
750 f7_msg->count--; in stm32f7_i2c_read_rx_data()
759 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_reload()
762 if (i2c_dev->use_dma) in stm32f7_i2c_reload()
763 f7_msg->count -= STM32F7_I2C_MAX_LEN; in stm32f7_i2c_reload()
765 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
768 if (f7_msg->count > STM32F7_I2C_MAX_LEN) { in stm32f7_i2c_reload()
772 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_reload()
775 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
780 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_reload()
793 val = f7_msg->buf - sizeof(u8); in stm32f7_i2c_smbus_reload()
794 f7_msg->count = *val; in stm32f7_i2c_smbus_reload()
795 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
797 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_reload()
798 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
805 dev_info(i2c_dev->dev, "Trying to recover bus\n"); in stm32f7_i2c_release_bus()
807 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_release_bus()
820 ret = readl_relaxed_poll_timeout(i2c_dev->base + STM32F7_I2C_ISR, in stm32f7_i2c_wait_free_bus()
827 dev_info(i2c_dev->dev, "bus busy\n"); in stm32f7_i2c_wait_free_bus()
829 ret = stm32f7_i2c_release_bus(&i2c_dev->adap); in stm32f7_i2c_wait_free_bus()
831 dev_err(i2c_dev->dev, "Failed to recover the bus (%d)\n", ret); in stm32f7_i2c_wait_free_bus()
835 return -EBUSY; in stm32f7_i2c_wait_free_bus()
841 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_xfer_msg()
842 void __iomem *base = i2c_dev->base; in stm32f7_i2c_xfer_msg()
846 f7_msg->addr = msg->addr; in stm32f7_i2c_xfer_msg()
847 f7_msg->buf = msg->buf; in stm32f7_i2c_xfer_msg()
848 f7_msg->count = msg->len; in stm32f7_i2c_xfer_msg()
849 f7_msg->result = 0; in stm32f7_i2c_xfer_msg()
850 f7_msg->stop = (i2c_dev->msg_id >= i2c_dev->msg_num - 1); in stm32f7_i2c_xfer_msg()
852 reinit_completion(&i2c_dev->complete); in stm32f7_i2c_xfer_msg()
859 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
864 if (msg->flags & I2C_M_TEN) { in stm32f7_i2c_xfer_msg()
866 cr2 |= STM32F7_I2C_CR2_SADD10(f7_msg->addr); in stm32f7_i2c_xfer_msg()
870 cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr); in stm32f7_i2c_xfer_msg()
875 if (f7_msg->count > STM32F7_I2C_MAX_LEN) { in stm32f7_i2c_xfer_msg()
879 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_xfer_msg()
891 i2c_dev->use_dma = false; in stm32f7_i2c_xfer_msg()
892 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) { in stm32f7_i2c_xfer_msg()
893 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_xfer_msg()
894 msg->flags & I2C_M_RD, in stm32f7_i2c_xfer_msg()
895 f7_msg->count, f7_msg->buf, in stm32f7_i2c_xfer_msg()
899 i2c_dev->use_dma = true; in stm32f7_i2c_xfer_msg()
901 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_xfer_msg()
904 if (!i2c_dev->use_dma) { in stm32f7_i2c_xfer_msg()
905 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
910 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
919 i2c_dev->master_mode = true; in stm32f7_i2c_xfer_msg()
930 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_xfer_msg()
931 struct device *dev = i2c_dev->dev; in stm32f7_i2c_smbus_xfer_msg()
932 void __iomem *base = i2c_dev->base; in stm32f7_i2c_smbus_xfer_msg()
936 f7_msg->result = 0; in stm32f7_i2c_smbus_xfer_msg()
937 reinit_completion(&i2c_dev->complete); in stm32f7_i2c_smbus_xfer_msg()
944 if (f7_msg->read_write) in stm32f7_i2c_smbus_xfer_msg()
949 cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr); in stm32f7_i2c_smbus_xfer_msg()
951 f7_msg->smbus_buf[0] = command; in stm32f7_i2c_smbus_xfer_msg()
952 switch (f7_msg->size) { in stm32f7_i2c_smbus_xfer_msg()
954 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
955 f7_msg->count = 0; in stm32f7_i2c_smbus_xfer_msg()
958 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
959 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
962 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
963 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
964 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
967 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
968 f7_msg->count = 2; in stm32f7_i2c_smbus_xfer_msg()
969 f7_msg->smbus_buf[1] = data->byte; in stm32f7_i2c_smbus_xfer_msg()
973 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
974 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
975 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
978 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
979 f7_msg->count = 3; in stm32f7_i2c_smbus_xfer_msg()
980 f7_msg->smbus_buf[1] = data->word & 0xff; in stm32f7_i2c_smbus_xfer_msg()
981 f7_msg->smbus_buf[2] = data->word >> 8; in stm32f7_i2c_smbus_xfer_msg()
985 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
986 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
987 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
990 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
991 if (data->block[0] > I2C_SMBUS_BLOCK_MAX || in stm32f7_i2c_smbus_xfer_msg()
992 !data->block[0]) { in stm32f7_i2c_smbus_xfer_msg()
994 data->block[0]); in stm32f7_i2c_smbus_xfer_msg()
995 return -EINVAL; in stm32f7_i2c_smbus_xfer_msg()
997 f7_msg->count = data->block[0] + 2; in stm32f7_i2c_smbus_xfer_msg()
998 for (i = 1; i < f7_msg->count; i++) in stm32f7_i2c_smbus_xfer_msg()
999 f7_msg->smbus_buf[i] = data->block[i - 1]; in stm32f7_i2c_smbus_xfer_msg()
1003 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1004 f7_msg->count = 3; in stm32f7_i2c_smbus_xfer_msg()
1005 f7_msg->smbus_buf[1] = data->word & 0xff; in stm32f7_i2c_smbus_xfer_msg()
1006 f7_msg->smbus_buf[2] = data->word >> 8; in stm32f7_i2c_smbus_xfer_msg()
1008 f7_msg->read_write = I2C_SMBUS_READ; in stm32f7_i2c_smbus_xfer_msg()
1011 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1012 if (data->block[0] > I2C_SMBUS_BLOCK_MAX - 1) { in stm32f7_i2c_smbus_xfer_msg()
1014 data->block[0]); in stm32f7_i2c_smbus_xfer_msg()
1015 return -EINVAL; in stm32f7_i2c_smbus_xfer_msg()
1017 f7_msg->count = data->block[0] + 2; in stm32f7_i2c_smbus_xfer_msg()
1018 for (i = 1; i < f7_msg->count; i++) in stm32f7_i2c_smbus_xfer_msg()
1019 f7_msg->smbus_buf[i] = data->block[i - 1]; in stm32f7_i2c_smbus_xfer_msg()
1021 f7_msg->read_write = I2C_SMBUS_READ; in stm32f7_i2c_smbus_xfer_msg()
1025 return -EOPNOTSUPP; in stm32f7_i2c_smbus_xfer_msg()
1027 dev_err(dev, "Unsupported smbus protocol %d\n", f7_msg->size); in stm32f7_i2c_smbus_xfer_msg()
1028 return -EOPNOTSUPP; in stm32f7_i2c_smbus_xfer_msg()
1031 f7_msg->buf = f7_msg->smbus_buf; in stm32f7_i2c_smbus_xfer_msg()
1034 if ((flags & I2C_CLIENT_PEC) && f7_msg->size != I2C_SMBUS_QUICK) { in stm32f7_i2c_smbus_xfer_msg()
1037 if (!f7_msg->read_write) in stm32f7_i2c_smbus_xfer_msg()
1038 f7_msg->count++; in stm32f7_i2c_smbus_xfer_msg()
1046 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_xfer_msg()
1057 i2c_dev->use_dma = false; in stm32f7_i2c_smbus_xfer_msg()
1058 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) { in stm32f7_i2c_smbus_xfer_msg()
1059 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_smbus_xfer_msg()
1061 f7_msg->count, f7_msg->buf, in stm32f7_i2c_smbus_xfer_msg()
1065 i2c_dev->use_dma = true; in stm32f7_i2c_smbus_xfer_msg()
1067 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_smbus_xfer_msg()
1070 if (!i2c_dev->use_dma) { in stm32f7_i2c_smbus_xfer_msg()
1085 i2c_dev->master_mode = true; in stm32f7_i2c_smbus_xfer_msg()
1096 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_rep_start()
1097 void __iomem *base = i2c_dev->base; in stm32f7_i2c_smbus_rep_start()
1107 switch (f7_msg->size) { in stm32f7_i2c_smbus_rep_start()
1109 f7_msg->count = 1; in stm32f7_i2c_smbus_rep_start()
1113 f7_msg->count = 2; in stm32f7_i2c_smbus_rep_start()
1117 f7_msg->count = 1; in stm32f7_i2c_smbus_rep_start()
1122 f7_msg->buf = f7_msg->smbus_buf; in stm32f7_i2c_smbus_rep_start()
1123 f7_msg->stop = true; in stm32f7_i2c_smbus_rep_start()
1127 f7_msg->count++; in stm32f7_i2c_smbus_rep_start()
1131 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_rep_start()
1147 i2c_dev->use_dma = false; in stm32f7_i2c_smbus_rep_start()
1148 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN && in stm32f7_i2c_smbus_rep_start()
1149 f7_msg->size != I2C_SMBUS_BLOCK_DATA && in stm32f7_i2c_smbus_rep_start()
1150 f7_msg->size != I2C_SMBUS_BLOCK_PROC_CALL) { in stm32f7_i2c_smbus_rep_start()
1151 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_smbus_rep_start()
1153 f7_msg->count, f7_msg->buf, in stm32f7_i2c_smbus_rep_start()
1158 i2c_dev->use_dma = true; in stm32f7_i2c_smbus_rep_start()
1160 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_smbus_rep_start()
1163 if (!i2c_dev->use_dma) in stm32f7_i2c_smbus_rep_start()
1178 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_check_pec()
1181 internal_pec = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR); in stm32f7_i2c_smbus_check_pec()
1183 switch (f7_msg->size) { in stm32f7_i2c_smbus_check_pec()
1186 received_pec = f7_msg->smbus_buf[1]; in stm32f7_i2c_smbus_check_pec()
1190 received_pec = f7_msg->smbus_buf[2]; in stm32f7_i2c_smbus_check_pec()
1194 count = f7_msg->smbus_buf[0]; in stm32f7_i2c_smbus_check_pec()
1195 received_pec = f7_msg->smbus_buf[count]; in stm32f7_i2c_smbus_check_pec()
1198 dev_err(i2c_dev->dev, "Unsupported smbus protocol for PEC\n"); in stm32f7_i2c_smbus_check_pec()
1199 return -EINVAL; in stm32f7_i2c_smbus_check_pec()
1203 dev_err(i2c_dev->dev, "Bad PEC 0x%02x vs. 0x%02x\n", in stm32f7_i2c_smbus_check_pec()
1205 return -EBADMSG; in stm32f7_i2c_smbus_check_pec()
1218 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_is_addr_match()
1220 * For 10-bit addr, addcode = 11110XY with in stm32f7_i2c_is_addr_match()
1224 addr = slave->addr >> 8; in stm32f7_i2c_is_addr_match()
1229 addr = slave->addr & 0x7f; in stm32f7_i2c_is_addr_match()
1239 struct i2c_client *slave = i2c_dev->slave_running; in stm32f7_i2c_slave_start()
1240 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_start()
1244 if (i2c_dev->slave_dir) { in stm32f7_i2c_slave_start()
1287 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_addr()
1291 isr = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_slave_addr()
1296 if (stm32f7_i2c_is_addr_match(i2c_dev->slave[i], addcode)) { in stm32f7_i2c_slave_addr()
1297 i2c_dev->slave_running = i2c_dev->slave[i]; in stm32f7_i2c_slave_addr()
1298 i2c_dev->slave_dir = dir; in stm32f7_i2c_slave_addr()
1317 if (i2c_dev->slave[i] == slave) { in stm32f7_i2c_get_slave_id()
1323 dev_err(i2c_dev->dev, "Slave 0x%x not registered\n", slave->addr); in stm32f7_i2c_get_slave_id()
1325 return -ENODEV; in stm32f7_i2c_get_slave_id()
1331 struct device *dev = i2c_dev->dev; in stm32f7_i2c_get_free_slave_id()
1336 * slave[STM32F7_SLAVE_7_10_BITS_ADDR] supports 7-bit and 10-bit slave address in stm32f7_i2c_get_free_slave_id()
1337 * slave[STM32F7_SLAVE_7_BITS_ADDR] supports 7-bit slave address only in stm32f7_i2c_get_free_slave_id()
1339 if (i2c_dev->smbus_mode && (slave->addr == 0x08)) { in stm32f7_i2c_get_free_slave_id()
1340 if (i2c_dev->slave[STM32F7_SLAVE_HOSTNOTIFY]) in stm32f7_i2c_get_free_slave_id()
1346 for (i = STM32F7_I2C_MAX_SLAVE - 1; i > STM32F7_SLAVE_HOSTNOTIFY; i--) { in stm32f7_i2c_get_free_slave_id()
1348 (slave->flags & I2C_CLIENT_TEN)) in stm32f7_i2c_get_free_slave_id()
1350 if (!i2c_dev->slave[i]) { in stm32f7_i2c_get_free_slave_id()
1357 dev_err(dev, "Slave 0x%x could not be registered\n", slave->addr); in stm32f7_i2c_get_free_slave_id()
1359 return -EINVAL; in stm32f7_i2c_get_free_slave_id()
1367 if (i2c_dev->slave[i]) in stm32f7_i2c_is_slave_registered()
1380 if (i2c_dev->slave[i]) in stm32f7_i2c_is_slave_busy()
1389 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_isr_event()
1394 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_slave_isr_event()
1398 i2c_slave_event(i2c_dev->slave_running, in stm32f7_i2c_slave_isr_event()
1412 val = readb_relaxed(i2c_dev->base + STM32F7_I2C_RXDR); in stm32f7_i2c_slave_isr_event()
1413 ret = i2c_slave_event(i2c_dev->slave_running, in stm32f7_i2c_slave_isr_event()
1417 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1419 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1428 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK\n", __func__); in stm32f7_i2c_slave_isr_event()
1437 if (i2c_dev->slave_dir) { in stm32f7_i2c_slave_isr_event()
1450 i2c_slave_event(i2c_dev->slave_running, I2C_SLAVE_STOP, &val); in stm32f7_i2c_slave_isr_event()
1452 i2c_dev->slave_running = NULL; in stm32f7_i2c_slave_isr_event()
1465 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_event()
1466 void __iomem *base = i2c_dev->base; in stm32f7_i2c_isr_event()
1471 if (!i2c_dev->master_mode) { in stm32f7_i2c_isr_event()
1476 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_event()
1488 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK (addr %x)\n", in stm32f7_i2c_isr_event()
1489 __func__, f7_msg->addr); in stm32f7_i2c_isr_event()
1491 f7_msg->result = -ENXIO; in stm32f7_i2c_isr_event()
1506 if (i2c_dev->use_dma) { in stm32f7_i2c_isr_event()
1509 i2c_dev->master_mode = false; in stm32f7_i2c_isr_event()
1510 complete(&i2c_dev->complete); in stm32f7_i2c_isr_event()
1516 if (f7_msg->stop) { in stm32f7_i2c_isr_event()
1519 } else if (i2c_dev->use_dma) { in stm32f7_i2c_isr_event()
1521 } else if (f7_msg->smbus) { in stm32f7_i2c_isr_event()
1524 i2c_dev->msg_id++; in stm32f7_i2c_isr_event()
1525 i2c_dev->msg++; in stm32f7_i2c_isr_event()
1526 stm32f7_i2c_xfer_msg(i2c_dev, i2c_dev->msg); in stm32f7_i2c_isr_event()
1531 if (f7_msg->smbus) in stm32f7_i2c_isr_event()
1543 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_event_thread()
1544 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_isr_event_thread()
1552 ret = wait_for_completion_timeout(&i2c_dev->dma->dma_complete, HZ); in stm32f7_i2c_isr_event_thread()
1554 dev_dbg(i2c_dev->dev, "<%s>: Timed out\n", __func__); in stm32f7_i2c_isr_event_thread()
1556 dmaengine_terminate_all(dma->chan_using); in stm32f7_i2c_isr_event_thread()
1557 f7_msg->result = -ETIMEDOUT; in stm32f7_i2c_isr_event_thread()
1560 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_event_thread()
1563 if (f7_msg->smbus) { in stm32f7_i2c_isr_event_thread()
1566 i2c_dev->msg_id++; in stm32f7_i2c_isr_event_thread()
1567 i2c_dev->msg++; in stm32f7_i2c_isr_event_thread()
1568 stm32f7_i2c_xfer_msg(i2c_dev, i2c_dev->msg); in stm32f7_i2c_isr_event_thread()
1571 i2c_dev->master_mode = false; in stm32f7_i2c_isr_event_thread()
1572 complete(&i2c_dev->complete); in stm32f7_i2c_isr_event_thread()
1581 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_error()
1582 void __iomem *base = i2c_dev->base; in stm32f7_i2c_isr_error()
1583 struct device *dev = i2c_dev->dev; in stm32f7_i2c_isr_error()
1584 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_isr_error()
1587 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_error()
1593 stm32f7_i2c_release_bus(&i2c_dev->adap); in stm32f7_i2c_isr_error()
1594 f7_msg->result = -EIO; in stm32f7_i2c_isr_error()
1601 f7_msg->result = -EAGAIN; in stm32f7_i2c_isr_error()
1607 f7_msg->result = -EINVAL; in stm32f7_i2c_isr_error()
1610 if (!i2c_dev->slave_running) { in stm32f7_i2c_isr_error()
1621 if (i2c_dev->use_dma) { in stm32f7_i2c_isr_error()
1623 dmaengine_terminate_all(dma->chan_using); in stm32f7_i2c_isr_error()
1626 i2c_dev->master_mode = false; in stm32f7_i2c_isr_error()
1627 complete(&i2c_dev->complete); in stm32f7_i2c_isr_error()
1636 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_xfer()
1637 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_xfer()
1641 i2c_dev->msg = msgs; in stm32f7_i2c_xfer()
1642 i2c_dev->msg_num = num; in stm32f7_i2c_xfer()
1643 i2c_dev->msg_id = 0; in stm32f7_i2c_xfer()
1644 f7_msg->smbus = false; in stm32f7_i2c_xfer()
1646 ret = pm_runtime_get_sync(i2c_dev->dev); in stm32f7_i2c_xfer()
1656 time_left = wait_for_completion_timeout(&i2c_dev->complete, in stm32f7_i2c_xfer()
1657 i2c_dev->adap.timeout); in stm32f7_i2c_xfer()
1658 ret = f7_msg->result; in stm32f7_i2c_xfer()
1661 dev_dbg(i2c_dev->dev, "Access to slave 0x%x timed out\n", in stm32f7_i2c_xfer()
1662 i2c_dev->msg->addr); in stm32f7_i2c_xfer()
1663 if (i2c_dev->use_dma) in stm32f7_i2c_xfer()
1664 dmaengine_terminate_all(dma->chan_using); in stm32f7_i2c_xfer()
1665 ret = -ETIMEDOUT; in stm32f7_i2c_xfer()
1669 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_xfer()
1670 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_xfer()
1681 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_xfer()
1682 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_smbus_xfer()
1683 struct device *dev = i2c_dev->dev; in stm32f7_i2c_smbus_xfer()
1687 f7_msg->addr = addr; in stm32f7_i2c_smbus_xfer()
1688 f7_msg->size = size; in stm32f7_i2c_smbus_xfer()
1689 f7_msg->read_write = read_write; in stm32f7_i2c_smbus_xfer()
1690 f7_msg->smbus = true; in stm32f7_i2c_smbus_xfer()
1704 timeout = wait_for_completion_timeout(&i2c_dev->complete, in stm32f7_i2c_smbus_xfer()
1705 i2c_dev->adap.timeout); in stm32f7_i2c_smbus_xfer()
1706 ret = f7_msg->result; in stm32f7_i2c_smbus_xfer()
1711 dev_dbg(dev, "Access to slave 0x%x timed out\n", f7_msg->addr); in stm32f7_i2c_smbus_xfer()
1712 if (i2c_dev->use_dma) in stm32f7_i2c_smbus_xfer()
1713 dmaengine_terminate_all(dma->chan_using); in stm32f7_i2c_smbus_xfer()
1714 ret = -ETIMEDOUT; in stm32f7_i2c_smbus_xfer()
1729 data->byte = f7_msg->smbus_buf[0]; in stm32f7_i2c_smbus_xfer()
1733 data->word = f7_msg->smbus_buf[0] | in stm32f7_i2c_smbus_xfer()
1734 (f7_msg->smbus_buf[1] << 8); in stm32f7_i2c_smbus_xfer()
1738 for (i = 0; i <= f7_msg->smbus_buf[0]; i++) in stm32f7_i2c_smbus_xfer()
1739 data->block[i] = f7_msg->smbus_buf[i]; in stm32f7_i2c_smbus_xfer()
1743 ret = -EINVAL; in stm32f7_i2c_smbus_xfer()
1756 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_wakeup()
1759 if (!i2c_dev->wakeup_src) in stm32f7_i2c_enable_wakeup()
1763 device_set_wakeup_enable(i2c_dev->dev, true); in stm32f7_i2c_enable_wakeup()
1766 device_set_wakeup_enable(i2c_dev->dev, false); in stm32f7_i2c_enable_wakeup()
1773 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter); in stm32f7_i2c_reg_slave()
1774 void __iomem *base = i2c_dev->base; in stm32f7_i2c_reg_slave()
1775 struct device *dev = i2c_dev->dev; in stm32f7_i2c_reg_slave()
1779 if (slave->flags & I2C_CLIENT_PEC) { in stm32f7_i2c_reg_slave()
1781 return -EINVAL; in stm32f7_i2c_reg_slave()
1786 return -EBUSY; in stm32f7_i2c_reg_slave()
1803 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1808 oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_reg_slave()
1810 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_reg_slave()
1811 oar1 |= STM32F7_I2C_OAR1_OA1_10(slave->addr); in stm32f7_i2c_reg_slave()
1814 oar1 |= STM32F7_I2C_OAR1_OA1_7(slave->addr); in stm32f7_i2c_reg_slave()
1817 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1818 writel_relaxed(oar1, i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_reg_slave()
1823 oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_reg_slave()
1825 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_reg_slave()
1826 ret = -EOPNOTSUPP; in stm32f7_i2c_reg_slave()
1830 oar2 |= STM32F7_I2C_OAR2_OA2_7(slave->addr); in stm32f7_i2c_reg_slave()
1832 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1833 writel_relaxed(oar2, i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_reg_slave()
1838 ret = -ENODEV; in stm32f7_i2c_reg_slave()
1863 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter); in stm32f7_i2c_unreg_slave()
1864 void __iomem *base = i2c_dev->base; in stm32f7_i2c_unreg_slave()
1872 WARN_ON(!i2c_dev->slave[id]); in stm32f7_i2c_unreg_slave()
1874 ret = pm_runtime_get_sync(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
1886 i2c_dev->slave[id] = NULL; in stm32f7_i2c_unreg_slave()
1893 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
1894 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
1904 if (i2c_dev->bus_rate <= I2C_MAX_FAST_MODE_FREQ || in stm32f7_i2c_write_fm_plus_bits()
1905 IS_ERR_OR_NULL(i2c_dev->regmap)) in stm32f7_i2c_write_fm_plus_bits()
1909 if (i2c_dev->fmp_sreg == i2c_dev->fmp_creg) in stm32f7_i2c_write_fm_plus_bits()
1910 ret = regmap_update_bits(i2c_dev->regmap, in stm32f7_i2c_write_fm_plus_bits()
1911 i2c_dev->fmp_sreg, in stm32f7_i2c_write_fm_plus_bits()
1912 i2c_dev->fmp_mask, in stm32f7_i2c_write_fm_plus_bits()
1913 enable ? i2c_dev->fmp_mask : 0); in stm32f7_i2c_write_fm_plus_bits()
1915 ret = regmap_write(i2c_dev->regmap, in stm32f7_i2c_write_fm_plus_bits()
1916 enable ? i2c_dev->fmp_sreg : in stm32f7_i2c_write_fm_plus_bits()
1917 i2c_dev->fmp_creg, in stm32f7_i2c_write_fm_plus_bits()
1918 i2c_dev->fmp_mask); in stm32f7_i2c_write_fm_plus_bits()
1926 struct device_node *np = pdev->dev.of_node; in stm32f7_i2c_setup_fm_plus_bits()
1929 i2c_dev->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg-fmp"); in stm32f7_i2c_setup_fm_plus_bits()
1930 if (IS_ERR(i2c_dev->regmap)) in stm32f7_i2c_setup_fm_plus_bits()
1934 ret = of_property_read_u32_index(np, "st,syscfg-fmp", 1, in stm32f7_i2c_setup_fm_plus_bits()
1935 &i2c_dev->fmp_sreg); in stm32f7_i2c_setup_fm_plus_bits()
1939 i2c_dev->fmp_creg = i2c_dev->fmp_sreg + in stm32f7_i2c_setup_fm_plus_bits()
1940 i2c_dev->setup.fmp_clr_offset; in stm32f7_i2c_setup_fm_plus_bits()
1942 return of_property_read_u32_index(np, "st,syscfg-fmp", 2, in stm32f7_i2c_setup_fm_plus_bits()
1943 &i2c_dev->fmp_mask); in stm32f7_i2c_setup_fm_plus_bits()
1948 struct i2c_adapter *adap = &i2c_dev->adap; in stm32f7_i2c_enable_smbus_host()
1949 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_smbus_host()
1956 i2c_dev->host_notify_client = client; in stm32f7_i2c_enable_smbus_host()
1966 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_smbus_host()
1968 if (i2c_dev->host_notify_client) { in stm32f7_i2c_disable_smbus_host()
1972 i2c_free_slave_host_notify_device(i2c_dev->host_notify_client); in stm32f7_i2c_disable_smbus_host()
1987 if (i2c_dev->smbus_mode) in stm32f7_i2c_func()
2011 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in stm32f7_i2c_probe()
2013 return -ENOMEM; in stm32f7_i2c_probe()
2015 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in stm32f7_i2c_probe()
2016 if (IS_ERR(i2c_dev->base)) in stm32f7_i2c_probe()
2017 return PTR_ERR(i2c_dev->base); in stm32f7_i2c_probe()
2018 phy_addr = (dma_addr_t)res->start; in stm32f7_i2c_probe()
2022 if (irq_event != -EPROBE_DEFER) in stm32f7_i2c_probe()
2023 dev_err(&pdev->dev, "Failed to get IRQ event: %d\n", in stm32f7_i2c_probe()
2025 return irq_event ? : -ENOENT; in stm32f7_i2c_probe()
2030 if (irq_error != -EPROBE_DEFER) in stm32f7_i2c_probe()
2031 dev_err(&pdev->dev, "Failed to get IRQ error: %d\n", in stm32f7_i2c_probe()
2033 return irq_error ? : -ENOENT; in stm32f7_i2c_probe()
2036 i2c_dev->wakeup_src = of_property_read_bool(pdev->dev.of_node, in stm32f7_i2c_probe()
2037 "wakeup-source"); in stm32f7_i2c_probe()
2039 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL); in stm32f7_i2c_probe()
2040 if (IS_ERR(i2c_dev->clk)) in stm32f7_i2c_probe()
2041 return dev_err_probe(&pdev->dev, PTR_ERR(i2c_dev->clk), in stm32f7_i2c_probe()
2042 "Failed to get controller clock\n"); in stm32f7_i2c_probe()
2044 ret = clk_prepare_enable(i2c_dev->clk); in stm32f7_i2c_probe()
2046 dev_err(&pdev->dev, "Failed to prepare_enable clock\n"); in stm32f7_i2c_probe()
2050 rst = devm_reset_control_get(&pdev->dev, NULL); in stm32f7_i2c_probe()
2052 ret = dev_err_probe(&pdev->dev, PTR_ERR(rst), in stm32f7_i2c_probe()
2060 i2c_dev->dev = &pdev->dev; in stm32f7_i2c_probe()
2062 ret = devm_request_threaded_irq(&pdev->dev, irq_event, in stm32f7_i2c_probe()
2066 pdev->name, i2c_dev); in stm32f7_i2c_probe()
2068 dev_err(&pdev->dev, "Failed to request irq event %i\n", in stm32f7_i2c_probe()
2073 ret = devm_request_irq(&pdev->dev, irq_error, stm32f7_i2c_isr_error, 0, in stm32f7_i2c_probe()
2074 pdev->name, i2c_dev); in stm32f7_i2c_probe()
2076 dev_err(&pdev->dev, "Failed to request irq error %i\n", in stm32f7_i2c_probe()
2081 setup = of_device_get_match_data(&pdev->dev); in stm32f7_i2c_probe()
2083 dev_err(&pdev->dev, "Can't get device data\n"); in stm32f7_i2c_probe()
2084 ret = -ENODEV; in stm32f7_i2c_probe()
2087 i2c_dev->setup = *setup; in stm32f7_i2c_probe()
2089 ret = stm32f7_i2c_setup_timing(i2c_dev, &i2c_dev->setup); in stm32f7_i2c_probe()
2094 if (i2c_dev->bus_rate > I2C_MAX_FAST_MODE_FREQ) { in stm32f7_i2c_probe()
2103 adap = &i2c_dev->adap; in stm32f7_i2c_probe()
2105 snprintf(adap->name, sizeof(adap->name), "STM32F7 I2C(%pa)", in stm32f7_i2c_probe()
2106 &res->start); in stm32f7_i2c_probe()
2107 adap->owner = THIS_MODULE; in stm32f7_i2c_probe()
2108 adap->timeout = 2 * HZ; in stm32f7_i2c_probe()
2109 adap->retries = 3; in stm32f7_i2c_probe()
2110 adap->algo = &stm32f7_i2c_algo; in stm32f7_i2c_probe()
2111 adap->dev.parent = &pdev->dev; in stm32f7_i2c_probe()
2112 adap->dev.of_node = pdev->dev.of_node; in stm32f7_i2c_probe()
2114 init_completion(&i2c_dev->complete); in stm32f7_i2c_probe()
2117 i2c_dev->dma = stm32_i2c_dma_request(i2c_dev->dev, phy_addr, in stm32f7_i2c_probe()
2120 if (IS_ERR(i2c_dev->dma)) { in stm32f7_i2c_probe()
2121 ret = PTR_ERR(i2c_dev->dma); in stm32f7_i2c_probe()
2123 if (ret != -ENODEV) in stm32f7_i2c_probe()
2125 dev_dbg(i2c_dev->dev, "No DMA option: fallback using interrupts\n"); in stm32f7_i2c_probe()
2126 i2c_dev->dma = NULL; in stm32f7_i2c_probe()
2129 if (i2c_dev->wakeup_src) { in stm32f7_i2c_probe()
2130 device_set_wakeup_capable(i2c_dev->dev, true); in stm32f7_i2c_probe()
2132 ret = dev_pm_set_wake_irq(i2c_dev->dev, irq_event); in stm32f7_i2c_probe()
2134 dev_err(i2c_dev->dev, "Failed to set wake up irq\n"); in stm32f7_i2c_probe()
2141 pm_runtime_set_autosuspend_delay(i2c_dev->dev, in stm32f7_i2c_probe()
2143 pm_runtime_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2144 pm_runtime_set_active(i2c_dev->dev); in stm32f7_i2c_probe()
2145 pm_runtime_enable(i2c_dev->dev); in stm32f7_i2c_probe()
2147 pm_runtime_get_noresume(&pdev->dev); in stm32f7_i2c_probe()
2151 i2c_dev->smbus_mode = of_property_read_bool(pdev->dev.of_node, "smbus"); in stm32f7_i2c_probe()
2157 if (i2c_dev->smbus_mode) { in stm32f7_i2c_probe()
2160 dev_err(i2c_dev->dev, in stm32f7_i2c_probe()
2161 "failed to enable SMBus Host-Notify protocol (%d)\n", in stm32f7_i2c_probe()
2167 dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr); in stm32f7_i2c_probe()
2169 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_probe()
2170 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2178 pm_runtime_put_noidle(i2c_dev->dev); in stm32f7_i2c_probe()
2179 pm_runtime_disable(i2c_dev->dev); in stm32f7_i2c_probe()
2180 pm_runtime_set_suspended(i2c_dev->dev); in stm32f7_i2c_probe()
2181 pm_runtime_dont_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2183 if (i2c_dev->wakeup_src) in stm32f7_i2c_probe()
2184 dev_pm_clear_wake_irq(i2c_dev->dev); in stm32f7_i2c_probe()
2187 if (i2c_dev->wakeup_src) in stm32f7_i2c_probe()
2188 device_set_wakeup_capable(i2c_dev->dev, false); in stm32f7_i2c_probe()
2190 if (i2c_dev->dma) { in stm32f7_i2c_probe()
2191 stm32_i2c_dma_free(i2c_dev->dma); in stm32f7_i2c_probe()
2192 i2c_dev->dma = NULL; in stm32f7_i2c_probe()
2199 clk_disable_unprepare(i2c_dev->clk); in stm32f7_i2c_probe()
2210 i2c_del_adapter(&i2c_dev->adap); in stm32f7_i2c_remove()
2211 pm_runtime_get_sync(i2c_dev->dev); in stm32f7_i2c_remove()
2213 if (i2c_dev->wakeup_src) { in stm32f7_i2c_remove()
2214 dev_pm_clear_wake_irq(i2c_dev->dev); in stm32f7_i2c_remove()
2219 device_init_wakeup(i2c_dev->dev, false); in stm32f7_i2c_remove()
2222 pm_runtime_put_noidle(i2c_dev->dev); in stm32f7_i2c_remove()
2223 pm_runtime_disable(i2c_dev->dev); in stm32f7_i2c_remove()
2224 pm_runtime_set_suspended(i2c_dev->dev); in stm32f7_i2c_remove()
2225 pm_runtime_dont_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_remove()
2227 if (i2c_dev->dma) { in stm32f7_i2c_remove()
2228 stm32_i2c_dma_free(i2c_dev->dma); in stm32f7_i2c_remove()
2229 i2c_dev->dma = NULL; in stm32f7_i2c_remove()
2234 clk_disable_unprepare(i2c_dev->clk); in stm32f7_i2c_remove()
2244 clk_disable_unprepare(i2c_dev->clk); in stm32f7_i2c_runtime_suspend()
2255 ret = clk_prepare_enable(i2c_dev->clk); in stm32f7_i2c_runtime_resume()
2257 dev_err(dev, "failed to prepare_enable clock\n"); in stm32f7_i2c_runtime_resume()
2269 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; in stm32f7_i2c_regs_backup()
2271 ret = pm_runtime_get_sync(i2c_dev->dev); in stm32f7_i2c_regs_backup()
2275 backup_regs->cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_backup()
2276 backup_regs->cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_regs_backup()
2277 backup_regs->oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_regs_backup()
2278 backup_regs->oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_regs_backup()
2279 backup_regs->tmgr = readl_relaxed(i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_regs_backup()
2282 pm_runtime_put_sync(i2c_dev->dev); in stm32f7_i2c_regs_backup()
2291 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; in stm32f7_i2c_regs_restore()
2293 ret = pm_runtime_get_sync(i2c_dev->dev); in stm32f7_i2c_regs_restore()
2297 cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_restore()
2299 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_regs_restore()
2302 writel_relaxed(backup_regs->tmgr, i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_regs_restore()
2303 writel_relaxed(backup_regs->cr1 & ~STM32F7_I2C_CR1_PE, in stm32f7_i2c_regs_restore()
2304 i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_restore()
2305 if (backup_regs->cr1 & STM32F7_I2C_CR1_PE) in stm32f7_i2c_regs_restore()
2306 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_regs_restore()
2308 writel_relaxed(backup_regs->cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_regs_restore()
2309 writel_relaxed(backup_regs->oar1, i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_regs_restore()
2310 writel_relaxed(backup_regs->oar2, i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_regs_restore()
2313 pm_runtime_put_sync(i2c_dev->dev); in stm32f7_i2c_regs_restore()
2323 i2c_mark_adapter_suspended(&i2c_dev->adap); in stm32f7_i2c_suspend()
2325 if (!device_may_wakeup(dev) && !dev->power.wakeup_path) { in stm32f7_i2c_suspend()
2328 i2c_mark_adapter_resumed(&i2c_dev->adap); in stm32f7_i2c_suspend()
2344 if (!device_may_wakeup(dev) && !dev->power.wakeup_path) { in stm32f7_i2c_resume()
2355 i2c_mark_adapter_resumed(&i2c_dev->adap); in stm32f7_i2c_resume()
2368 { .compatible = "st,stm32f7-i2c", .data = &stm32f7_setup},
2369 { .compatible = "st,stm32mp15-i2c", .data = &stm32mp15_setup},
2376 .name = "stm32f7-i2c",