100 #define NPCM_I2CCTL1			0x06  macro
430 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_eob_int()
436 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_eob_int()
496 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_int_enable()
502 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_int_enable()
509 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_master_start()
512 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_master_start()
525 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_master_stop()
528 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_master_stop()
547 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_stall_after_start()
553 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_stall_after_start()
560 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_nack()
563 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_nack()
572 	i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_slave_int_enable()
578 	iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_slave_int_enable()
590 		i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_slave_enable()
595 		iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_slave_enable()
632 	i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_reset()
639 	iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_reset()
1639 		       ioread8(bus->reg + NPCM_I2CCTL1)) == 1) &&  in npcm_i2c_int_master_handler()
1936 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_init_module()
1938 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_init_module()