28 #define PCH_I2CCTL	0x04	/* I2C control register */  macro
222 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_I2CCTL_I2CMEN);  in pch_i2c_init()
244 	iowrite32(reg_value, p + PCH_I2CCTL);  in pch_i2c_init()
248 		ioread32(p + PCH_I2CCTL), pch_i2cbc, pch_i2ctmr);  in pch_i2c_init()
297 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));  in pch_i2c_start()
298 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);  in pch_i2c_start()
308 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));  in pch_i2c_stop()
310 	pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);  in pch_i2c_stop()
354 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));  in pch_i2c_repstart()
355 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_REPSTART);  in pch_i2c_repstart()
385 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);  in pch_i2c_writebytes()
387 	pch_dbg(adap, "I2CCTL = %x msgs->len = %d\n", ioread32(p + PCH_I2CCTL),  in pch_i2c_writebytes()
449 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));  in pch_i2c_sendack()
450 	pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);  in pch_i2c_sendack()
460 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));  in pch_i2c_sendnack()
461 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);  in pch_i2c_sendnack()
473 	pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));  in pch_i2c_restart()
474 	pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_RESTART);  in pch_i2c_restart()
503 	pch_clrbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);  in pch_i2c_readbytes()
722 	pch_clrbit(adap->pch_base_address, PCH_I2CCTL, NORMAL_INTR_ENBL);  in pch_i2c_disbl_int()