49 	ret = regmap_read(dev->map, DW_IC_COMP_PARAM_1, &comp_param1);  in i2c_dw_set_timings_master()
255 	regmap_read(dev->map, DW_IC_ENABLE_STATUS, &dummy);  in i2c_dw_xfer_init()
258 	regmap_read(dev->map, DW_IC_CLR_INTR, &dummy);  in i2c_dw_xfer_init()
311 		regmap_read(dev->map, DW_IC_TXFLR, &flr);  in i2c_dw_xfer_msg()
314 		regmap_read(dev->map, DW_IC_RXFLR, &flr);  in i2c_dw_xfer_msg()
427 		regmap_read(dev->map, DW_IC_RXFLR, &rx_valid);  in i2c_dw_read()
432 			regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);  in i2c_dw_read()
570 	regmap_read(dev->map, DW_IC_INTR_STAT, &stat);  in i2c_dw_read_clear_intrbits()
580 		regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy);  in i2c_dw_read_clear_intrbits()
582 		regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy);  in i2c_dw_read_clear_intrbits()
584 		regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy);  in i2c_dw_read_clear_intrbits()
586 		regmap_read(dev->map, DW_IC_CLR_RD_REQ, &dummy);  in i2c_dw_read_clear_intrbits()
592 		regmap_read(dev->map, DW_IC_TX_ABRT_SOURCE, &dev->abort_source);  in i2c_dw_read_clear_intrbits()
593 		regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy);  in i2c_dw_read_clear_intrbits()
596 		regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy);  in i2c_dw_read_clear_intrbits()
598 		regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy);  in i2c_dw_read_clear_intrbits()
600 		regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy);  in i2c_dw_read_clear_intrbits()
602 		regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy);  in i2c_dw_read_clear_intrbits()
604 		regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy);  in i2c_dw_read_clear_intrbits()
647 		regmap_read(dev->map, DW_IC_INTR_MASK, &stat);  in i2c_dw_irq_handler_master()
660 	regmap_read(dev->map, DW_IC_ENABLE, &enabled);  in i2c_dw_isr()
661 	regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &stat);  in i2c_dw_isr()