Lines Matching full:trace
3 tristate "Intel(R) Trace Hub controller"
6 Intel(R) Trace Hub (TH) is a set of hardware blocks (subdevices) that
7 produce, switch and output trace data from multiple hardware and
8 software sources over several types of trace output ports encoded
9 in System Trace Protocol (MIPI STPv2) and is intended to perform
16 Say Y here to enable Intel(R) Trace Hub controller support.
21 tristate "Intel(R) Trace Hub PCI controller"
24 Intel(R) Trace Hub may exist as a PCI device. This option enables
30 tristate "Intel(R) Trace Hub ACPI controller"
33 Intel(R) Trace Hub may exist as an ACPI device. This option enables
35 'host debugger' mode, that is, the trace configuration and capture
42 tristate "Intel(R) Trace Hub Global Trace Hub"
44 Global Trace Hub (GTH) is the central component of the
49 Say Y here to enable GTH subdevice of Intel(R) Trace Hub.
52 tristate "Intel(R) Trace Hub Software Trace Hub support"
55 Software Trace Hub (STH) enables trace data from software
56 trace sources to be sent out via Intel(R) Trace Hub. It
59 Say Y here to enable STH subdevice of Intel(R) Trace Hub.
62 tristate "Intel(R) Trace Hub Memory Storage Unit"
64 Memory Storage Unit (MSU) trace output device enables
72 tristate "Intel(R) Trace Hub PTI output"
74 Parallel Trace Interface unit (PTI) is a trace output device
75 of Intel TH architecture that facilitates STP trace output via
81 bool "Intel(R) Trace Hub debugging"