132 #define adt7475_read(reg) i2c_smbus_read_byte_data(client, (reg))  macro
460 	data->config5 = adt7475_read(REG_CONFIG5);  in temp_store()
481 			adt7475_read(TEMP_THERM_REG(sattr->index)) << 2;  in temp_store()
665 	data->config5 = adt7475_read(REG_CONFIG5);  in point2_store()
667 		adt7475_read(TEMP_TMIN_REG(sattr->index)) << 2;  in point2_store()
669 		adt7475_read(TEMP_TRANGE_REG(sattr->index));  in point2_store()
789 			adt7475_read(PWM_CONFIG_REG(sattr->index));  in pwm_store()
1001 		adt7475_read(TEMP_TRANGE_REG(sattr->index));  in pwmfreq_store()
1321 	vendid = adt7475_read(REG_VENDID);  in adt7475_detect()
1322 	devid2 = adt7475_read(REG_DEVID2);  in adt7475_detect()
1327 	devid = adt7475_read(REG_DEVID);  in adt7475_detect()
1354 	ret = adt7475_read(REG_CONFIG4);  in adt7475_update_limits()
1359 	ret = adt7475_read(REG_CONFIG5);  in adt7475_update_limits()
1368 		ret = adt7475_read(VOLTAGE_MIN_REG(i));  in adt7475_update_limits()
1373 		ret = adt7475_read(VOLTAGE_MAX_REG(i));  in adt7475_update_limits()
1380 		ret = adt7475_read(REG_VTT_MIN);  in adt7475_update_limits()
1385 		ret = adt7475_read(REG_VTT_MAX);  in adt7475_update_limits()
1393 		ret = adt7475_read(TEMP_MIN_REG(i));  in adt7475_update_limits()
1398 		ret = adt7475_read(TEMP_MAX_REG(i));  in adt7475_update_limits()
1403 		ret = adt7475_read(TEMP_TMIN_REG(i));  in adt7475_update_limits()
1408 		ret = adt7475_read(TEMP_THERM_REG(i));  in adt7475_update_limits()
1413 		ret = adt7475_read(TEMP_OFFSET_REG(i));  in adt7475_update_limits()
1432 		ret = adt7475_read(PWM_MAX_REG(i));  in adt7475_update_limits()
1437 		ret = adt7475_read(PWM_MIN_REG(i));  in adt7475_update_limits()
1445 	ret = adt7475_read(TEMP_TRANGE_REG(0));  in adt7475_update_limits()
1450 	ret = adt7475_read(TEMP_TRANGE_REG(1));  in adt7475_update_limits()
1455 	ret = adt7475_read(TEMP_TRANGE_REG(2));  in adt7475_update_limits()
1525 		ret = adt7475_read(PWM_CONFIG_REG(i));  in adt7475_set_pwm_polarity()
1575 		revision = adt7475_read(REG_DEVID2) & 0x07;  in adt7475_probe()
1579 		revision = adt7475_read(REG_DEVID2) & 0x03;  in adt7475_probe()
1581 			revision += adt7475_read(REG_DEVREV2);  in adt7475_probe()
1585 		revision = adt7475_read(REG_DEVID2) & 0x07;  in adt7475_probe()
1588 	config3 = adt7475_read(REG_CONFIG3);  in adt7475_probe()
1596 	data->config4 = adt7475_read(REG_CONFIG4);  in adt7475_probe()
1622 		u8 vid = adt7475_read(REG_VID);  in adt7475_probe()
1626 		data->has_vid = !(adt7475_read(REG_CONFIG5) & CONFIG5_VIDGPIO);  in adt7475_probe()
1630 	data->config2 = adt7475_read(REG_CONFIG2);  in adt7475_probe()
1659 					  adt7475_read(REG_CONFIG1) | 0x01);  in adt7475_probe()
1741 	data->temp[HYSTERSIS][0] = (u16) adt7475_read(REG_REMOTE1_HYSTERSIS);  in adt7475_read_hystersis()
1743 	data->temp[HYSTERSIS][2] = (u16) adt7475_read(REG_REMOTE2_HYSTERSIS);  in adt7475_read_hystersis()
1751 	data->pwm[CONTROL][index] = adt7475_read(PWM_CONFIG_REG(index));  in adt7475_read_pwm()
1811 	ret = adt7475_read(REG_STATUS2);  in adt7475_update_measure()
1816 	ret = adt7475_read(REG_STATUS1);  in adt7475_update_measure()
1821 	ret = adt7475_read(REG_EXTEND2);  in adt7475_update_measure()
1827 	ret = adt7475_read(REG_EXTEND1);  in adt7475_update_measure()
1836 		ret = adt7475_read(VOLTAGE_REG(i));  in adt7475_update_measure()
1845 		ret = adt7475_read(TEMP_REG(i));  in adt7475_update_measure()
1854 		ret = adt7475_read(REG_STATUS4);  in adt7475_update_measure()
1859 		ret = adt7475_read(REG_EXTEND3);  in adt7475_update_measure()
1864 		ret = adt7475_read(REG_VTT);  in adt7475_update_measure()
1884 		ret = adt7475_read(PWM_REG(i));  in adt7475_update_measure()
1891 		ret = adt7475_read(REG_VID);  in adt7475_update_measure()