Lines Matching +full:0 +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2006-2008 Hans de Goede <hdegoede@redhat.com>
25 #include <linux/hwmon-sysfs.h>
30 #define ABIT_UGURU3_SETTINGS_BANK 0x01
31 #define ABIT_UGURU3_SENSORS_BANK 0x08
32 #define ABIT_UGURU3_MISC_BANK 0x09
33 #define ABIT_UGURU3_ALARMS_START 0x1E
34 #define ABIT_UGURU3_SETTINGS_START 0x24
35 #define ABIT_UGURU3_VALUES_START 0x80
36 #define ABIT_UGURU3_BOARD_ID 0x0A
38 #define ABIT_UGURU3_TEMP_HIGH_ALARM_ENABLE 0x01 /* temp over warn */
39 #define ABIT_UGURU3_VOLT_HIGH_ALARM_ENABLE 0x02 /* volt over max */
40 #define ABIT_UGURU3_VOLT_LOW_ALARM_ENABLE 0x04 /* volt under min */
41 #define ABIT_UGURU3_TEMP_HIGH_ALARM_FLAG 0x10 /* temp is over warn */
42 #define ABIT_UGURU3_VOLT_HIGH_ALARM_FLAG 0x20 /* volt is over max */
43 #define ABIT_UGURU3_VOLT_LOW_ALARM_FLAG 0x40 /* volt is under min */
44 #define ABIT_UGURU3_FAN_LOW_ALARM_ENABLE 0x01 /* fan under min */
45 #define ABIT_UGURU3_BEEP_ENABLE 0x08 /* beep if alarm */
46 #define ABIT_UGURU3_SHUTDOWN_ENABLE 0x80 /* shutdown if alarm */
48 #define ABIT_UGURU3_IN_SENSOR 0
49 #define ABIT_UGURU3_TEMP_SENSOR 1
55 * cpu-speed independent, since the ISA-bus and not the CPU should be the
60 * Normally the 0xAC at the end of synchronize() is reported after the
70 } while (0)
75 * sum of strlen +1 of: in??_input\0, in??_{min,max}\0, in??_{min,max}_alarm\0,
76 * in??_{min,max}_alarm_enable\0, in??_beep\0, in??_shutdown\0, in??_label\0
81 * sum of strlen +1 of: temp??_input\0, temp??_max\0, temp??_crit\0,
82 * temp??_alarm\0, temp??_alarm_enable\0, temp??_beep\0, temp??_shutdown\0,
83 * temp??_label\0
87 * sum of strlen +1 of: fan??_input\0, fan??_min\0, fan??_alarm\0,
88 * fan??_alarm_enable\0, fan??_beep\0, fan??_shutdown\0, fan??_label\0
96 (ABIT_UGURU3_MAX_NO_SENSORS - 16) * ABIT_UGURU3_TEMP_NAMES_LENGTH)
104 /* Two i/o-ports are used by uGuru */
105 #define ABIT_UGURU3_BASE 0x00E0
106 #define ABIT_UGURU3_CMD 0x00
107 #define ABIT_UGURU3_DATA 0x04
111 * of the DATA register (0-255) on failure.
113 #define ABIT_UGURU3_SUCCESS -1
115 #define ABIT_UGURU3_STATUS_READY_FOR_READ 0x01
116 #define ABIT_UGURU3_STATUS_BUSY 0x02
134 const char *dmi_name[ABIT_UGURU3_MAX_DMI_NAMES + 1];
135 /* + 1 -> end of sensors indicated by a sensor with name == NULL */
136 struct abituguru3_sensor_info sensors[ABIT_UGURU3_MAX_NO_SENSORS + 1];
148 char valid; /* !=0 if following fields are valid */
170 /* Alarms for all 48 sensors (1 bit per sensor) */
187 { 0x000C, { NULL } /* Unknown, need DMI string */, {
188 { "CPU Core", 0, 0, 10, 1, 0 },
189 { "DDR", 1, 0, 10, 1, 0 },
190 { "DDR VTT", 2, 0, 10, 1, 0 },
191 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
192 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
193 { "MCH 2.5V", 5, 0, 20, 1, 0 },
194 { "ICH 1.05V", 6, 0, 10, 1, 0 },
195 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
196 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
197 { "ATX +5V", 9, 0, 30, 1, 0 },
198 { "+3.3V", 10, 0, 20, 1, 0 },
199 { "5VSB", 11, 0, 30, 1, 0 },
200 { "CPU", 24, 1, 1, 1, 0 },
201 { "System", 25, 1, 1, 1, 0 },
202 { "PWM", 26, 1, 1, 1, 0 },
203 { "CPU Fan", 32, 2, 60, 1, 0 },
204 { "NB Fan", 33, 2, 60, 1, 0 },
205 { "SYS FAN", 34, 2, 60, 1, 0 },
206 { "AUX1 Fan", 35, 2, 60, 1, 0 },
207 { NULL, 0, 0, 0, 0, 0 } }
209 { 0x000D, { NULL } /* Abit AW8, need DMI string */, {
210 { "CPU Core", 0, 0, 10, 1, 0 },
211 { "DDR", 1, 0, 10, 1, 0 },
212 { "DDR VTT", 2, 0, 10, 1, 0 },
213 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
214 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
215 { "MCH 2.5V", 5, 0, 20, 1, 0 },
216 { "ICH 1.05V", 6, 0, 10, 1, 0 },
217 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
218 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
219 { "ATX +5V", 9, 0, 30, 1, 0 },
220 { "+3.3V", 10, 0, 20, 1, 0 },
221 { "5VSB", 11, 0, 30, 1, 0 },
222 { "CPU", 24, 1, 1, 1, 0 },
223 { "System", 25, 1, 1, 1, 0 },
224 { "PWM1", 26, 1, 1, 1, 0 },
225 { "PWM2", 27, 1, 1, 1, 0 },
226 { "PWM3", 28, 1, 1, 1, 0 },
227 { "PWM4", 29, 1, 1, 1, 0 },
228 { "CPU Fan", 32, 2, 60, 1, 0 },
229 { "NB Fan", 33, 2, 60, 1, 0 },
230 { "SYS Fan", 34, 2, 60, 1, 0 },
231 { "AUX1 Fan", 35, 2, 60, 1, 0 },
232 { "AUX2 Fan", 36, 2, 60, 1, 0 },
233 { "AUX3 Fan", 37, 2, 60, 1, 0 },
234 { "AUX4 Fan", 38, 2, 60, 1, 0 },
235 { "AUX5 Fan", 39, 2, 60, 1, 0 },
236 { NULL, 0, 0, 0, 0, 0 } }
238 { 0x000E, { NULL } /* AL-8, need DMI string */, {
239 { "CPU Core", 0, 0, 10, 1, 0 },
240 { "DDR", 1, 0, 10, 1, 0 },
241 { "DDR VTT", 2, 0, 10, 1, 0 },
242 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
243 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
244 { "MCH 2.5V", 5, 0, 20, 1, 0 },
245 { "ICH 1.05V", 6, 0, 10, 1, 0 },
246 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
247 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
248 { "ATX +5V", 9, 0, 30, 1, 0 },
249 { "+3.3V", 10, 0, 20, 1, 0 },
250 { "5VSB", 11, 0, 30, 1, 0 },
251 { "CPU", 24, 1, 1, 1, 0 },
252 { "System", 25, 1, 1, 1, 0 },
253 { "PWM", 26, 1, 1, 1, 0 },
254 { "CPU Fan", 32, 2, 60, 1, 0 },
255 { "NB Fan", 33, 2, 60, 1, 0 },
256 { "SYS Fan", 34, 2, 60, 1, 0 },
257 { NULL, 0, 0, 0, 0, 0 } }
259 { 0x000F, { NULL } /* Unknown, need DMI string */, {
261 { "CPU Core", 0, 0, 10, 1, 0 },
262 { "DDR", 1, 0, 10, 1, 0 },
263 { "DDR VTT", 2, 0, 10, 1, 0 },
264 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
265 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
266 { "MCH 2.5V", 5, 0, 20, 1, 0 },
267 { "ICH 1.05V", 6, 0, 10, 1, 0 },
268 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
269 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
270 { "ATX +5V", 9, 0, 30, 1, 0 },
271 { "+3.3V", 10, 0, 20, 1, 0 },
272 { "5VSB", 11, 0, 30, 1, 0 },
273 { "CPU", 24, 1, 1, 1, 0 },
274 { "System", 25, 1, 1, 1, 0 },
275 { "PWM", 26, 1, 1, 1, 0 },
276 { "CPU Fan", 32, 2, 60, 1, 0 },
277 { "NB Fan", 33, 2, 60, 1, 0 },
278 { "SYS Fan", 34, 2, 60, 1, 0 },
279 { NULL, 0, 0, 0, 0, 0 } }
281 { 0x0010, { NULL } /* Abit NI8 SLI GR, need DMI string */, {
282 { "CPU Core", 0, 0, 10, 1, 0 },
283 { "DDR", 1, 0, 10, 1, 0 },
284 { "DDR VTT", 2, 0, 10, 1, 0 },
285 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
286 { "NB 1.4V", 4, 0, 10, 1, 0 },
287 { "SB 1.5V", 6, 0, 10, 1, 0 },
288 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
289 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
290 { "ATX +5V", 9, 0, 30, 1, 0 },
291 { "+3.3V", 10, 0, 20, 1, 0 },
292 { "5VSB", 11, 0, 30, 1, 0 },
293 { "CPU", 24, 1, 1, 1, 0 },
294 { "SYS", 25, 1, 1, 1, 0 },
295 { "PWM", 26, 1, 1, 1, 0 },
296 { "CPU Fan", 32, 2, 60, 1, 0 },
297 { "NB Fan", 33, 2, 60, 1, 0 },
298 { "SYS Fan", 34, 2, 60, 1, 0 },
299 { "AUX1 Fan", 35, 2, 60, 1, 0 },
300 { "OTES1 Fan", 36, 2, 60, 1, 0 },
301 { NULL, 0, 0, 0, 0, 0 } }
303 { 0x0011, { "AT8 32X", NULL }, {
304 { "CPU Core", 0, 0, 10, 1, 0 },
305 { "DDR", 1, 0, 20, 1, 0 },
306 { "DDR VTT", 2, 0, 10, 1, 0 },
307 { "CPU VDDA 2.5V", 6, 0, 20, 1, 0 },
308 { "NB 1.8V", 4, 0, 10, 1, 0 },
309 { "NB 1.8V Dual", 5, 0, 10, 1, 0 },
310 { "HTV 1.2", 3, 0, 10, 1, 0 },
311 { "PCIE 1.2V", 12, 0, 10, 1, 0 },
312 { "NB 1.2V", 13, 0, 10, 1, 0 },
313 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
314 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
315 { "ATX +5V", 9, 0, 30, 1, 0 },
316 { "+3.3V", 10, 0, 20, 1, 0 },
317 { "5VSB", 11, 0, 30, 1, 0 },
318 { "CPU", 24, 1, 1, 1, 0 },
319 { "NB", 25, 1, 1, 1, 0 },
320 { "System", 26, 1, 1, 1, 0 },
321 { "PWM", 27, 1, 1, 1, 0 },
322 { "CPU Fan", 32, 2, 60, 1, 0 },
323 { "NB Fan", 33, 2, 60, 1, 0 },
324 { "SYS Fan", 34, 2, 60, 1, 0 },
325 { "AUX1 Fan", 35, 2, 60, 1, 0 },
326 { "AUX2 Fan", 36, 2, 60, 1, 0 },
327 { "AUX3 Fan", 37, 2, 60, 1, 0 },
328 { NULL, 0, 0, 0, 0, 0 } }
330 { 0x0012, { NULL } /* Abit AN8 32X, need DMI string */, {
331 { "CPU Core", 0, 0, 10, 1, 0 },
332 { "DDR", 1, 0, 20, 1, 0 },
333 { "DDR VTT", 2, 0, 10, 1, 0 },
334 { "HyperTransport", 3, 0, 10, 1, 0 },
335 { "CPU VDDA 2.5V", 5, 0, 20, 1, 0 },
336 { "NB", 4, 0, 10, 1, 0 },
337 { "SB", 6, 0, 10, 1, 0 },
338 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
339 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
340 { "ATX +5V", 9, 0, 30, 1, 0 },
341 { "+3.3V", 10, 0, 20, 1, 0 },
342 { "5VSB", 11, 0, 30, 1, 0 },
343 { "CPU", 24, 1, 1, 1, 0 },
344 { "SYS", 25, 1, 1, 1, 0 },
345 { "PWM", 26, 1, 1, 1, 0 },
346 { "CPU Fan", 32, 2, 60, 1, 0 },
347 { "NB Fan", 33, 2, 60, 1, 0 },
348 { "SYS Fan", 34, 2, 60, 1, 0 },
349 { "AUX1 Fan", 36, 2, 60, 1, 0 },
350 { NULL, 0, 0, 0, 0, 0 } }
352 { 0x0013, { NULL } /* Abit AW8D, need DMI string */, {
353 { "CPU Core", 0, 0, 10, 1, 0 },
354 { "DDR", 1, 0, 10, 1, 0 },
355 { "DDR VTT", 2, 0, 10, 1, 0 },
356 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
357 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
358 { "MCH 2.5V", 5, 0, 20, 1, 0 },
359 { "ICH 1.05V", 6, 0, 10, 1, 0 },
360 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
361 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
362 { "ATX +5V", 9, 0, 30, 1, 0 },
363 { "+3.3V", 10, 0, 20, 1, 0 },
364 { "5VSB", 11, 0, 30, 1, 0 },
365 { "CPU", 24, 1, 1, 1, 0 },
366 { "System", 25, 1, 1, 1, 0 },
367 { "PWM1", 26, 1, 1, 1, 0 },
368 { "PWM2", 27, 1, 1, 1, 0 },
369 { "PWM3", 28, 1, 1, 1, 0 },
370 { "PWM4", 29, 1, 1, 1, 0 },
371 { "CPU Fan", 32, 2, 60, 1, 0 },
372 { "NB Fan", 33, 2, 60, 1, 0 },
373 { "SYS Fan", 34, 2, 60, 1, 0 },
374 { "AUX1 Fan", 35, 2, 60, 1, 0 },
375 { "AUX2 Fan", 36, 2, 60, 1, 0 },
376 { "AUX3 Fan", 37, 2, 60, 1, 0 },
377 { "AUX4 Fan", 38, 2, 60, 1, 0 },
378 { "AUX5 Fan", 39, 2, 60, 1, 0 },
379 { NULL, 0, 0, 0, 0, 0 } }
381 { 0x0014, { "AB9", "AB9 Pro", NULL }, {
382 { "CPU Core", 0, 0, 10, 1, 0 },
383 { "DDR", 1, 0, 10, 1, 0 },
384 { "DDR VTT", 2, 0, 10, 1, 0 },
385 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
386 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
387 { "MCH 2.5V", 5, 0, 20, 1, 0 },
388 { "ICH 1.05V", 6, 0, 10, 1, 0 },
389 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
390 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
391 { "ATX +5V", 9, 0, 30, 1, 0 },
392 { "+3.3V", 10, 0, 20, 1, 0 },
393 { "5VSB", 11, 0, 30, 1, 0 },
394 { "CPU", 24, 1, 1, 1, 0 },
395 { "System", 25, 1, 1, 1, 0 },
396 { "PWM", 26, 1, 1, 1, 0 },
397 { "CPU Fan", 32, 2, 60, 1, 0 },
398 { "NB Fan", 33, 2, 60, 1, 0 },
399 { "SYS Fan", 34, 2, 60, 1, 0 },
400 { NULL, 0, 0, 0, 0, 0 } }
402 { 0x0015, { NULL } /* Unknown, need DMI string */, {
403 { "CPU Core", 0, 0, 10, 1, 0 },
404 { "DDR", 1, 0, 20, 1, 0 },
405 { "DDR VTT", 2, 0, 10, 1, 0 },
406 { "HyperTransport", 3, 0, 10, 1, 0 },
407 { "CPU VDDA 2.5V", 5, 0, 20, 1, 0 },
408 { "NB", 4, 0, 10, 1, 0 },
409 { "SB", 6, 0, 10, 1, 0 },
410 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
411 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
412 { "ATX +5V", 9, 0, 30, 1, 0 },
413 { "+3.3V", 10, 0, 20, 1, 0 },
414 { "5VSB", 11, 0, 30, 1, 0 },
415 { "CPU", 24, 1, 1, 1, 0 },
416 { "SYS", 25, 1, 1, 1, 0 },
417 { "PWM", 26, 1, 1, 1, 0 },
418 { "CPU Fan", 32, 2, 60, 1, 0 },
419 { "NB Fan", 33, 2, 60, 1, 0 },
420 { "SYS Fan", 34, 2, 60, 1, 0 },
421 { "AUX1 Fan", 33, 2, 60, 1, 0 },
422 { "AUX2 Fan", 35, 2, 60, 1, 0 },
423 { "AUX3 Fan", 36, 2, 60, 1, 0 },
424 { NULL, 0, 0, 0, 0, 0 } }
426 { 0x0016, { "AW9D-MAX", NULL }, {
427 { "CPU Core", 0, 0, 10, 1, 0 },
428 { "DDR2", 1, 0, 20, 1, 0 },
429 { "DDR2 VTT", 2, 0, 10, 1, 0 },
430 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
431 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
432 { "MCH 2.5V", 5, 0, 20, 1, 0 },
433 { "ICH 1.05V", 6, 0, 10, 1, 0 },
434 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
435 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
436 { "ATX +5V", 9, 0, 30, 1, 0 },
437 { "+3.3V", 10, 0, 20, 1, 0 },
438 { "5VSB", 11, 0, 30, 1, 0 },
439 { "CPU", 24, 1, 1, 1, 0 },
440 { "System", 25, 1, 1, 1, 0 },
441 { "PWM1", 26, 1, 1, 1, 0 },
442 { "PWM2", 27, 1, 1, 1, 0 },
443 { "PWM3", 28, 1, 1, 1, 0 },
444 { "PWM4", 29, 1, 1, 1, 0 },
445 { "CPU Fan", 32, 2, 60, 1, 0 },
446 { "NB Fan", 33, 2, 60, 1, 0 },
447 { "SYS Fan", 34, 2, 60, 1, 0 },
448 { "AUX1 Fan", 35, 2, 60, 1, 0 },
449 { "AUX2 Fan", 36, 2, 60, 1, 0 },
450 { "AUX3 Fan", 37, 2, 60, 1, 0 },
451 { "OTES1 Fan", 38, 2, 60, 1, 0 },
452 { NULL, 0, 0, 0, 0, 0 } }
454 { 0x0017, { NULL } /* Unknown, need DMI string */, {
455 { "CPU Core", 0, 0, 10, 1, 0 },
456 { "DDR2", 1, 0, 20, 1, 0 },
457 { "DDR2 VTT", 2, 0, 10, 1, 0 },
458 { "HyperTransport", 3, 0, 10, 1, 0 },
459 { "CPU VDDA 2.5V", 6, 0, 20, 1, 0 },
460 { "NB 1.8V", 4, 0, 10, 1, 0 },
461 { "NB 1.2V ", 13, 0, 10, 1, 0 },
462 { "SB 1.2V", 5, 0, 10, 1, 0 },
463 { "PCIE 1.2V", 12, 0, 10, 1, 0 },
464 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
465 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
466 { "ATX +5V", 9, 0, 30, 1, 0 },
467 { "ATX +3.3V", 10, 0, 20, 1, 0 },
468 { "ATX 5VSB", 11, 0, 30, 1, 0 },
469 { "CPU", 24, 1, 1, 1, 0 },
470 { "System", 26, 1, 1, 1, 0 },
471 { "PWM", 27, 1, 1, 1, 0 },
472 { "CPU FAN", 32, 2, 60, 1, 0 },
473 { "SYS FAN", 34, 2, 60, 1, 0 },
474 { "AUX1 FAN", 35, 2, 60, 1, 0 },
475 { "AUX2 FAN", 36, 2, 60, 1, 0 },
476 { "AUX3 FAN", 37, 2, 60, 1, 0 },
477 { NULL, 0, 0, 0, 0, 0 } }
479 { 0x0018, { "AB9 QuadGT", NULL }, {
480 { "CPU Core", 0, 0, 10, 1, 0 },
481 { "DDR2", 1, 0, 20, 1, 0 },
482 { "DDR2 VTT", 2, 0, 10, 1, 0 },
483 { "CPU VTT", 3, 0, 10, 1, 0 },
484 { "MCH 1.25V", 4, 0, 10, 1, 0 },
485 { "ICHIO 1.5V", 5, 0, 10, 1, 0 },
486 { "ICH 1.05V", 6, 0, 10, 1, 0 },
487 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
488 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
489 { "ATX +5V", 9, 0, 30, 1, 0 },
490 { "+3.3V", 10, 0, 20, 1, 0 },
491 { "5VSB", 11, 0, 30, 1, 0 },
492 { "CPU", 24, 1, 1, 1, 0 },
493 { "System", 25, 1, 1, 1, 0 },
494 { "PWM Phase1", 26, 1, 1, 1, 0 },
495 { "PWM Phase2", 27, 1, 1, 1, 0 },
496 { "PWM Phase3", 28, 1, 1, 1, 0 },
497 { "PWM Phase4", 29, 1, 1, 1, 0 },
498 { "PWM Phase5", 30, 1, 1, 1, 0 },
499 { "CPU Fan", 32, 2, 60, 1, 0 },
500 { "SYS Fan", 34, 2, 60, 1, 0 },
501 { "AUX1 Fan", 33, 2, 60, 1, 0 },
502 { "AUX2 Fan", 35, 2, 60, 1, 0 },
503 { "AUX3 Fan", 36, 2, 60, 1, 0 },
504 { NULL, 0, 0, 0, 0, 0 } }
506 { 0x0019, { "IN9 32X MAX", NULL }, {
507 { "CPU Core", 7, 0, 10, 1, 0 },
508 { "DDR2", 13, 0, 20, 1, 0 },
509 { "DDR2 VTT", 14, 0, 10, 1, 0 },
510 { "CPU VTT", 3, 0, 20, 1, 0 },
511 { "NB 1.2V", 4, 0, 10, 1, 0 },
512 { "SB 1.5V", 6, 0, 10, 1, 0 },
513 { "HyperTransport", 5, 0, 10, 1, 0 },
514 { "ATX +12V (24-Pin)", 12, 0, 60, 1, 0 },
515 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
516 { "ATX +5V", 9, 0, 30, 1, 0 },
517 { "ATX +3.3V", 10, 0, 20, 1, 0 },
518 { "ATX 5VSB", 11, 0, 30, 1, 0 },
519 { "CPU", 24, 1, 1, 1, 0 },
520 { "System", 25, 1, 1, 1, 0 },
521 { "PWM Phase1", 26, 1, 1, 1, 0 },
522 { "PWM Phase2", 27, 1, 1, 1, 0 },
523 { "PWM Phase3", 28, 1, 1, 1, 0 },
524 { "PWM Phase4", 29, 1, 1, 1, 0 },
525 { "PWM Phase5", 30, 1, 1, 1, 0 },
526 { "CPU FAN", 32, 2, 60, 1, 0 },
527 { "SYS FAN", 34, 2, 60, 1, 0 },
528 { "AUX1 FAN", 33, 2, 60, 1, 0 },
529 { "AUX2 FAN", 35, 2, 60, 1, 0 },
530 { "AUX3 FAN", 36, 2, 60, 1, 0 },
531 { NULL, 0, 0, 0, 0, 0 } }
533 { 0x001A, { "IP35 Pro", "IP35 Pro XE", NULL }, {
534 { "CPU Core", 0, 0, 10, 1, 0 },
535 { "DDR2", 1, 0, 20, 1, 0 },
536 { "DDR2 VTT", 2, 0, 10, 1, 0 },
537 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
538 { "MCH 1.25V", 4, 0, 10, 1, 0 },
539 { "ICHIO 1.5V", 5, 0, 10, 1, 0 },
540 { "ICH 1.05V", 6, 0, 10, 1, 0 },
541 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
542 { "ATX +12V (8-pin)", 8, 0, 60, 1, 0 },
543 { "ATX +5V", 9, 0, 30, 1, 0 },
544 { "+3.3V", 10, 0, 20, 1, 0 },
545 { "5VSB", 11, 0, 30, 1, 0 },
546 { "CPU", 24, 1, 1, 1, 0 },
547 { "System", 25, 1, 1, 1, 0 },
548 { "PWM", 26, 1, 1, 1, 0 },
549 { "PWM Phase2", 27, 1, 1, 1, 0 },
550 { "PWM Phase3", 28, 1, 1, 1, 0 },
551 { "PWM Phase4", 29, 1, 1, 1, 0 },
552 { "PWM Phase5", 30, 1, 1, 1, 0 },
553 { "CPU Fan", 32, 2, 60, 1, 0 },
554 { "SYS Fan", 34, 2, 60, 1, 0 },
555 { "AUX1 Fan", 33, 2, 60, 1, 0 },
556 { "AUX2 Fan", 35, 2, 60, 1, 0 },
557 { "AUX3 Fan", 36, 2, 60, 1, 0 },
558 { "AUX4 Fan", 37, 2, 60, 1, 0 },
559 { NULL, 0, 0, 0, 0, 0 } }
561 { 0x001B, { NULL } /* Unknown, need DMI string */, {
562 { "CPU Core", 0, 0, 10, 1, 0 },
563 { "DDR3", 1, 0, 20, 1, 0 },
564 { "DDR3 VTT", 2, 0, 10, 1, 0 },
565 { "CPU VTT", 3, 0, 10, 1, 0 },
566 { "MCH 1.25V", 4, 0, 10, 1, 0 },
567 { "ICHIO 1.5V", 5, 0, 10, 1, 0 },
568 { "ICH 1.05V", 6, 0, 10, 1, 0 },
569 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
570 { "ATX +12V (8-pin)", 8, 0, 60, 1, 0 },
571 { "ATX +5V", 9, 0, 30, 1, 0 },
572 { "+3.3V", 10, 0, 20, 1, 0 },
573 { "5VSB", 11, 0, 30, 1, 0 },
574 { "CPU", 24, 1, 1, 1, 0 },
575 { "System", 25, 1, 1, 1, 0 },
576 { "PWM Phase1", 26, 1, 1, 1, 0 },
577 { "PWM Phase2", 27, 1, 1, 1, 0 },
578 { "PWM Phase3", 28, 1, 1, 1, 0 },
579 { "PWM Phase4", 29, 1, 1, 1, 0 },
580 { "PWM Phase5", 30, 1, 1, 1, 0 },
581 { "CPU Fan", 32, 2, 60, 1, 0 },
582 { "SYS Fan", 34, 2, 60, 1, 0 },
583 { "AUX1 Fan", 33, 2, 60, 1, 0 },
584 { "AUX2 Fan", 35, 2, 60, 1, 0 },
585 { "AUX3 Fan", 36, 2, 60, 1, 0 },
586 { NULL, 0, 0, 0, 0, 0 } }
588 { 0x001C, { "IX38 QuadGT", NULL }, {
589 { "CPU Core", 0, 0, 10, 1, 0 },
590 { "DDR2", 1, 0, 20, 1, 0 },
591 { "DDR2 VTT", 2, 0, 10, 1, 0 },
592 { "CPU VTT", 3, 0, 10, 1, 0 },
593 { "MCH 1.25V", 4, 0, 10, 1, 0 },
594 { "ICHIO 1.5V", 5, 0, 10, 1, 0 },
595 { "ICH 1.05V", 6, 0, 10, 1, 0 },
596 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
597 { "ATX +12V (8-pin)", 8, 0, 60, 1, 0 },
598 { "ATX +5V", 9, 0, 30, 1, 0 },
599 { "+3.3V", 10, 0, 20, 1, 0 },
600 { "5VSB", 11, 0, 30, 1, 0 },
601 { "CPU", 24, 1, 1, 1, 0 },
602 { "System", 25, 1, 1, 1, 0 },
603 { "PWM Phase1", 26, 1, 1, 1, 0 },
604 { "PWM Phase2", 27, 1, 1, 1, 0 },
605 { "PWM Phase3", 28, 1, 1, 1, 0 },
606 { "PWM Phase4", 29, 1, 1, 1, 0 },
607 { "PWM Phase5", 30, 1, 1, 1, 0 },
608 { "CPU Fan", 32, 2, 60, 1, 0 },
609 { "SYS Fan", 34, 2, 60, 1, 0 },
610 { "AUX1 Fan", 33, 2, 60, 1, 0 },
611 { "AUX2 Fan", 35, 2, 60, 1, 0 },
612 { "AUX3 Fan", 36, 2, 60, 1, 0 },
613 { NULL, 0, 0, 0, 0, 0 } }
615 { 0x0000, { NULL }, { { NULL, 0, 0, 0, 0, 0 } } }
621 module_param(force, bool, 0);
623 /* Default verbose is 1, since this driver is still in the testing phase */
624 static bool verbose = 1;
638 while ((x = inb_p(data->addr + ABIT_UGURU3_DATA)) & in abituguru3_wait_while_busy()
640 timeout--; in abituguru3_wait_while_busy()
641 if (timeout == 0) in abituguru3_wait_while_busy()
647 if (timeout == 1) in abituguru3_wait_while_busy()
648 msleep(1); in abituguru3_wait_while_busy()
659 while (!((x = inb_p(data->addr + ABIT_UGURU3_DATA)) & in abituguru3_wait_for_read()
661 timeout--; in abituguru3_wait_for_read()
662 if (timeout == 0) in abituguru3_wait_for_read()
668 if (timeout == 1) in abituguru3_wait_for_read()
669 msleep(1); in abituguru3_wait_for_read()
685 "wait, status: 0x%02x\n", x); in abituguru3_synchronize()
686 return -EIO; in abituguru3_synchronize()
689 outb(0x20, data->addr + ABIT_UGURU3_DATA); in abituguru3_synchronize()
692 ABIT_UGURU3_DEBUG("synchronize timeout after sending 0x20, " in abituguru3_synchronize()
693 "status: 0x%02x\n", x); in abituguru3_synchronize()
694 return -EIO; in abituguru3_synchronize()
697 outb(0x10, data->addr + ABIT_UGURU3_CMD); in abituguru3_synchronize()
700 ABIT_UGURU3_DEBUG("synchronize timeout after sending 0x10, " in abituguru3_synchronize()
701 "status: 0x%02x\n", x); in abituguru3_synchronize()
702 return -EIO; in abituguru3_synchronize()
705 outb(0x00, data->addr + ABIT_UGURU3_CMD); in abituguru3_synchronize()
708 ABIT_UGURU3_DEBUG("synchronize timeout after sending 0x00, " in abituguru3_synchronize()
709 "status: 0x%02x\n", x); in abituguru3_synchronize()
710 return -EIO; in abituguru3_synchronize()
716 "status: 0x%02x\n", x); in abituguru3_synchronize()
717 return -EIO; in abituguru3_synchronize()
720 while ((x = inb(data->addr + ABIT_UGURU3_CMD)) != 0xAC) { in abituguru3_synchronize()
721 timeout--; in abituguru3_synchronize()
722 if (timeout == 0) { in abituguru3_synchronize()
724 "hold 0xAC after synchronize, cmd: 0x%02x\n", in abituguru3_synchronize()
726 return -EIO; in abituguru3_synchronize()
728 msleep(1); in abituguru3_synchronize()
730 return 0; in abituguru3_synchronize()
746 outb(0x1A, data->addr + ABIT_UGURU3_DATA); in abituguru3_read()
749 ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after " in abituguru3_read()
750 "sending 0x1A, status: 0x%02x\n", (unsigned int)bank, in abituguru3_read()
752 return -EIO; in abituguru3_read()
755 outb(bank, data->addr + ABIT_UGURU3_CMD); in abituguru3_read()
758 ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after " in abituguru3_read()
759 "sending the bank, status: 0x%02x\n", in abituguru3_read()
761 return -EIO; in abituguru3_read()
764 outb(offset, data->addr + ABIT_UGURU3_CMD); in abituguru3_read()
767 ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after " in abituguru3_read()
768 "sending the offset, status: 0x%02x\n", in abituguru3_read()
770 return -EIO; in abituguru3_read()
773 outb(count, data->addr + ABIT_UGURU3_CMD); in abituguru3_read()
776 ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after " in abituguru3_read()
777 "sending the count, status: 0x%02x\n", in abituguru3_read()
779 return -EIO; in abituguru3_read()
782 for (i = 0; i < count; i++) { in abituguru3_read()
786 "0x%02x:0x%02x, status: 0x%02x\n", i, in abituguru3_read()
790 buf[i] = inb(data->addr + ABIT_UGURU3_CMD); in abituguru3_read()
796 * Sensor settings are stored 1 byte per offset with the bytes
805 for (i = 0; i < offset_count; i++) { in abituguru3_read_increment_offset()
809 if (x < 0) in abituguru3_read_increment_offset()
820 * sensor_device_attribute_2->index: index into the data->sensors array
821 * sensor_device_attribute_2->nr: register offset, bitmask or NA.
834 return -EIO; in show_value()
836 sensor = &data->sensors[attr->index]; in show_value()
839 if (attr->nr) in show_value()
840 value = data->settings[sensor->port][attr->nr]; in show_value()
842 value = data->value[sensor->port]; in show_value()
845 value = (value * sensor->multiplier) / sensor->divisor + in show_value()
846 sensor->offset; in show_value()
852 if (sensor->type == ABIT_UGURU3_TEMP_SENSOR) in show_value()
866 return -EIO; in show_alarm()
868 port = data->sensors[attr->index].port; in show_alarm()
872 * given in attr->nr also check if the alarm matches the type of alarm in show_alarm()
876 if ((data->alarms[port / 8] & (0x01 << (port % 8))) && in show_alarm()
877 (!attr->nr || (data->settings[port][0] & attr->nr))) in show_alarm()
878 return sprintf(buf, "1\n"); in show_alarm()
880 return sprintf(buf, "0\n"); in show_alarm()
889 if (data->settings[data->sensors[attr->index].port][0] & attr->nr) in show_mask()
890 return sprintf(buf, "1\n"); in show_mask()
892 return sprintf(buf, "0\n"); in show_mask()
901 return sprintf(buf, "%s\n", data->sensors[attr->index].name); in show_label()
913 SENSOR_ATTR_2(in%d_input, 0444, show_value, NULL, 0, 0),
914 SENSOR_ATTR_2(in%d_min, 0444, show_value, NULL, 1, 0),
915 SENSOR_ATTR_2(in%d_max, 0444, show_value, NULL, 2, 0),
917 ABIT_UGURU3_VOLT_LOW_ALARM_FLAG, 0),
919 ABIT_UGURU3_VOLT_HIGH_ALARM_FLAG, 0),
921 ABIT_UGURU3_BEEP_ENABLE, 0),
923 ABIT_UGURU3_SHUTDOWN_ENABLE, 0),
925 ABIT_UGURU3_VOLT_LOW_ALARM_ENABLE, 0),
927 ABIT_UGURU3_VOLT_HIGH_ALARM_ENABLE, 0),
928 SENSOR_ATTR_2(in%d_label, 0444, show_label, NULL, 0, 0)
930 SENSOR_ATTR_2(temp%d_input, 0444, show_value, NULL, 0, 0),
931 SENSOR_ATTR_2(temp%d_max, 0444, show_value, NULL, 1, 0),
932 SENSOR_ATTR_2(temp%d_crit, 0444, show_value, NULL, 2, 0),
933 SENSOR_ATTR_2(temp%d_alarm, 0444, show_alarm, NULL, 0, 0),
935 ABIT_UGURU3_BEEP_ENABLE, 0),
937 ABIT_UGURU3_SHUTDOWN_ENABLE, 0),
939 ABIT_UGURU3_TEMP_HIGH_ALARM_ENABLE, 0),
940 SENSOR_ATTR_2(temp%d_label, 0444, show_label, NULL, 0, 0)
942 SENSOR_ATTR_2(fan%d_input, 0444, show_value, NULL, 0, 0),
943 SENSOR_ATTR_2(fan%d_min, 0444, show_value, NULL, 1, 0),
944 SENSOR_ATTR_2(fan%d_alarm, 0444, show_alarm, NULL, 0, 0),
946 ABIT_UGURU3_BEEP_ENABLE, 0),
948 ABIT_UGURU3_SHUTDOWN_ENABLE, 0),
950 ABIT_UGURU3_FAN_LOW_ALARM_ENABLE, 0),
951 SENSOR_ATTR_2(fan%d_label, 0444, show_label, NULL, 0, 0)
955 SENSOR_ATTR_2(name, 0444, show_name, NULL, 0, 0),
961 int sensor_index[3] = { 0, 1, 1 }; in abituguru3_probe()
963 int i, j, type, used, sysfs_names_free, sysfs_attr_i, res = -ENODEV; in abituguru3_probe()
968 data = devm_kzalloc(&pdev->dev, sizeof(struct abituguru3_data), in abituguru3_probe()
971 return -ENOMEM; in abituguru3_probe()
973 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start; in abituguru3_probe()
974 mutex_init(&data->update_lock); in abituguru3_probe()
984 if (!abituguru3_update_device(&pdev->dev)) in abituguru3_probe()
988 id = ((u16)buf[0] << 8) | (u16)buf[1]; in abituguru3_probe()
989 for (i = 0; abituguru3_motherboards[i].id; i++) in abituguru3_probe()
997 data->sensors = abituguru3_motherboards[i].sensors; in abituguru3_probe()
1002 sysfs_attr_i = 0; in abituguru3_probe()
1003 sysfs_filename = data->sysfs_names; in abituguru3_probe()
1005 for (i = 0; data->sensors[i].name; i++) { in abituguru3_probe()
1010 res = -ENAMETOOLONG; in abituguru3_probe()
1013 type = data->sensors[i].type; in abituguru3_probe()
1014 for (j = 0; j < no_sysfs_attr[type]; j++) { in abituguru3_probe()
1017 name, sensor_index[type]) + 1; in abituguru3_probe()
1018 data->sysfs_attr[sysfs_attr_i] = in abituguru3_probe()
1020 data->sysfs_attr[sysfs_attr_i].dev_attr.attr.name = in abituguru3_probe()
1022 data->sysfs_attr[sysfs_attr_i].index = i; in abituguru3_probe()
1024 sysfs_names_free -= used; in abituguru3_probe()
1030 if (sysfs_names_free < 0) { in abituguru3_probe()
1033 res = -ENAMETOOLONG; in abituguru3_probe()
1038 for (i = 0; i < sysfs_attr_i; i++) in abituguru3_probe()
1039 if (device_create_file(&pdev->dev, in abituguru3_probe()
1040 &data->sysfs_attr[i].dev_attr)) in abituguru3_probe()
1042 for (i = 0; i < ARRAY_SIZE(abituguru3_sysfs_attr); i++) in abituguru3_probe()
1043 if (device_create_file(&pdev->dev, in abituguru3_probe()
1047 data->hwmon_dev = hwmon_device_register(&pdev->dev); in abituguru3_probe()
1048 if (IS_ERR(data->hwmon_dev)) { in abituguru3_probe()
1049 res = PTR_ERR(data->hwmon_dev); in abituguru3_probe()
1053 return 0; /* success */ in abituguru3_probe()
1056 for (i = 0; data->sysfs_attr[i].dev_attr.attr.name; i++) in abituguru3_probe()
1057 device_remove_file(&pdev->dev, &data->sysfs_attr[i].dev_attr); in abituguru3_probe()
1058 for (i = 0; i < ARRAY_SIZE(abituguru3_sysfs_attr); i++) in abituguru3_probe()
1059 device_remove_file(&pdev->dev, in abituguru3_probe()
1069 hwmon_device_unregister(data->hwmon_dev); in abituguru3_remove()
1070 for (i = 0; data->sysfs_attr[i].dev_attr.attr.name; i++) in abituguru3_remove()
1071 device_remove_file(&pdev->dev, &data->sysfs_attr[i].dev_attr); in abituguru3_remove()
1072 for (i = 0; i < ARRAY_SIZE(abituguru3_sysfs_attr); i++) in abituguru3_remove()
1073 device_remove_file(&pdev->dev, in abituguru3_remove()
1075 return 0; in abituguru3_remove()
1083 mutex_lock(&data->update_lock); in abituguru3_update_device()
1084 if (!data->valid || time_after(jiffies, data->last_updated + HZ)) { in abituguru3_update_device()
1085 /* Clear data->valid while updating */ in abituguru3_update_device()
1086 data->valid = 0; in abituguru3_update_device()
1091 1, data->alarms, 48/8) != (48/8)) in abituguru3_update_device()
1094 for (i = 0; i < 32; i++) { in abituguru3_update_device()
1097 1, &data->value[i]) != 1) in abituguru3_update_device()
1102 1, in abituguru3_update_device()
1103 data->settings[i], 3) != 3) in abituguru3_update_device()
1107 for (i = 0; i < 16; i++) { in abituguru3_update_device()
1110 1, &data->value[32 + i]) != 1) in abituguru3_update_device()
1115 i * 2, 1, in abituguru3_update_device()
1116 data->settings[32 + i], 2) != 2) in abituguru3_update_device()
1119 data->last_updated = jiffies; in abituguru3_update_device()
1120 data->valid = 1; in abituguru3_update_device()
1123 mutex_unlock(&data->update_lock); in abituguru3_update_device()
1124 if (data->valid) in abituguru3_update_device()
1138 mutex_lock(&data->update_lock); in abituguru3_suspend()
1139 return 0; in abituguru3_suspend()
1145 mutex_unlock(&data->update_lock); in abituguru3_resume()
1146 return 0; in abituguru3_resume()
1167 int i, err = (force) ? 1 : -ENODEV; in abituguru3_dmi_detect()
1186 while (sublen > 0 && board_name[sublen - 1] == ' ') in abituguru3_dmi_detect()
1187 sublen--; in abituguru3_dmi_detect()
1189 for (i = 0; abituguru3_motherboards[i].id; i++) { in abituguru3_dmi_detect()
1195 return 0; in abituguru3_dmi_detect()
1200 return 1; in abituguru3_dmi_detect()
1211 * See if there is an uguru3 there. An idle uGuru3 will hold 0x00 or in abituguru3_detect()
1212 * 0x08 at DATA and 0xAC at CMD. Sometimes the uGuru3 will hold 0x05 in abituguru3_detect()
1213 * or 0x55 at CMD instead, why is unknown. in abituguru3_detect()
1217 if (((data_val == 0x00) || (data_val == 0x08)) && in abituguru3_detect()
1218 ((cmd_val == 0xAC) || (cmd_val == 0x05) || in abituguru3_detect()
1219 (cmd_val == 0x55))) in abituguru3_detect()
1220 return 0; in abituguru3_detect()
1222 ABIT_UGURU3_DEBUG("no Abit uGuru3 found, data = 0x%02X, cmd = " in abituguru3_detect()
1223 "0x%02X\n", (unsigned int)data_val, (unsigned int)cmd_val); in abituguru3_detect()
1227 return 0; in abituguru3_detect()
1231 return -ENODEV; in abituguru3_detect()
1243 if (err < 0) in abituguru3_init()
1250 if (err > 0) { in abituguru3_init()
1267 err = -ENOMEM; in abituguru3_init()
1272 res.end = ABIT_UGURU3_BASE + ABIT_UGURU3_REGION_LENGTH - 1; in abituguru3_init()
1275 err = platform_device_add_resources(abituguru3_pdev, &res, 1); in abituguru3_init()
1287 return 0; in abituguru3_init()