168 	zx_writel(tvenc->mmio + VENC_VIDEO_INFO, zmode->video_info);  in zx_tvenc_encoder_mode_set()
169 	zx_writel(tvenc->mmio + VENC_VIDEO_RES, zmode->video_res);  in zx_tvenc_encoder_mode_set()
170 	zx_writel(tvenc->mmio + VENC_FIELD1_PARAM, zmode->field1_param);  in zx_tvenc_encoder_mode_set()
171 	zx_writel(tvenc->mmio + VENC_FIELD2_PARAM, zmode->field2_param);  in zx_tvenc_encoder_mode_set()
172 	zx_writel(tvenc->mmio + VENC_LINE_O_1, zmode->burst_line_odd1);  in zx_tvenc_encoder_mode_set()
173 	zx_writel(tvenc->mmio + VENC_LINE_E_1, zmode->burst_line_even1);  in zx_tvenc_encoder_mode_set()
174 	zx_writel(tvenc->mmio + VENC_LINE_O_2, zmode->burst_line_odd2);  in zx_tvenc_encoder_mode_set()
175 	zx_writel(tvenc->mmio + VENC_LINE_E_2, zmode->burst_line_even2);  in zx_tvenc_encoder_mode_set()
176 	zx_writel(tvenc->mmio + VENC_LINE_TIMING_PARAM,  in zx_tvenc_encoder_mode_set()
178 	zx_writel(tvenc->mmio + VENC_WEIGHT_VALUE, zmode->weight_value);  in zx_tvenc_encoder_mode_set()
179 	zx_writel(tvenc->mmio + VENC_BLANK_BLACK_LEVEL,  in zx_tvenc_encoder_mode_set()
181 	zx_writel(tvenc->mmio + VENC_BURST_LEVEL, zmode->burst_level);  in zx_tvenc_encoder_mode_set()
182 	zx_writel(tvenc->mmio + VENC_CONTROL_PARAM, zmode->control_param);  in zx_tvenc_encoder_mode_set()
183 	zx_writel(tvenc->mmio + VENC_SUB_CARRIER_PHASE1,  in zx_tvenc_encoder_mode_set()
185 	zx_writel(tvenc->mmio + VENC_PHASE_LINE_INCR_CVBS,  in zx_tvenc_encoder_mode_set()
200 	zx_writel(tvenc->mmio + VENC_ENABLE, 1);  in zx_tvenc_encoder_enable()
208 	zx_writel(tvenc->mmio + VENC_ENABLE, 0);  in zx_tvenc_encoder_disable()