Lines Matching refs:tilcdc_clear
133 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); in tilcdc_crtc_load_palette()
135 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA); in tilcdc_crtc_load_palette()
166 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, in tilcdc_crtc_disable_irqs()
169 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, in tilcdc_crtc_disable_irqs()
189 tilcdc_clear(dev, LCDC_CLK_RESET_REG, LCDC_CLK_MAIN_RESET); in reset()
368 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, in tilcdc_crtc_set_mode()
405 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_PIXEL_CLOCK); in tilcdc_crtc_set_mode()
410 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); in tilcdc_crtc_set_mode()
415 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE); in tilcdc_crtc_set_mode()
420 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_HSYNC); in tilcdc_crtc_set_mode()
425 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_VSYNC); in tilcdc_crtc_set_mode()
430 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER); in tilcdc_crtc_set_mode()
464 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE); in tilcdc_crtc_enable()
506 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); in tilcdc_crtc_off()
704 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); in tilcdc_crtc_reset()
935 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, in tilcdc_crtc_irq()
949 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, in tilcdc_crtc_irq()
974 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, in tilcdc_crtc_irq()