335 static void dispc_ovr_write(struct dispc_device *dispc, u32 hw_videoport,  in dispc_ovr_write()  argument
338 	void __iomem *base = dispc->base_ovr[hw_videoport];  in dispc_ovr_write()
343 static u32 dispc_ovr_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg)  in dispc_ovr_read()  argument
345 	void __iomem *base = dispc->base_ovr[hw_videoport];  in dispc_ovr_read()
350 static void dispc_vp_write(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_write()  argument
353 	void __iomem *base = dispc->base_vp[hw_videoport];  in dispc_vp_write()
358 static u32 dispc_vp_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg)  in dispc_vp_read()  argument
360 	void __iomem *base = dispc->base_vp[hw_videoport];  in dispc_vp_read()
444 static dispc_irq_t dispc_vp_irq_from_raw(u32 stat, u32 hw_videoport)  in dispc_vp_irq_from_raw()  argument
449 		vp_stat |= DSS_IRQ_VP_FRAME_DONE(hw_videoport);  in dispc_vp_irq_from_raw()
451 		vp_stat |= DSS_IRQ_VP_VSYNC_EVEN(hw_videoport);  in dispc_vp_irq_from_raw()
453 		vp_stat |= DSS_IRQ_VP_VSYNC_ODD(hw_videoport);  in dispc_vp_irq_from_raw()
455 		vp_stat |= DSS_IRQ_VP_SYNC_LOST(hw_videoport);  in dispc_vp_irq_from_raw()
460 static u32 dispc_vp_irq_to_raw(dispc_irq_t vpstat, u32 hw_videoport)  in dispc_vp_irq_to_raw()  argument
464 	if (vpstat & DSS_IRQ_VP_FRAME_DONE(hw_videoport))  in dispc_vp_irq_to_raw()
466 	if (vpstat & DSS_IRQ_VP_VSYNC_EVEN(hw_videoport))  in dispc_vp_irq_to_raw()
468 	if (vpstat & DSS_IRQ_VP_VSYNC_ODD(hw_videoport))  in dispc_vp_irq_to_raw()
470 	if (vpstat & DSS_IRQ_VP_SYNC_LOST(hw_videoport))  in dispc_vp_irq_to_raw()
497 					       u32 hw_videoport)  in dispc_k2g_vp_read_irqstatus()  argument
499 	u32 stat = dispc_vp_read(dispc, hw_videoport, DISPC_VP_K2G_IRQSTATUS);  in dispc_k2g_vp_read_irqstatus()
501 	return dispc_vp_irq_from_raw(stat, hw_videoport);  in dispc_k2g_vp_read_irqstatus()
505 					 u32 hw_videoport, dispc_irq_t vpstat)  in dispc_k2g_vp_write_irqstatus()  argument
507 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);  in dispc_k2g_vp_write_irqstatus()
509 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_IRQSTATUS, stat);  in dispc_k2g_vp_write_irqstatus()
529 					       u32 hw_videoport)  in dispc_k2g_vp_read_irqenable()  argument
531 	u32 stat = dispc_vp_read(dispc, hw_videoport, DISPC_VP_K2G_IRQENABLE);  in dispc_k2g_vp_read_irqenable()
533 	return dispc_vp_irq_from_raw(stat, hw_videoport);  in dispc_k2g_vp_read_irqenable()
537 				       u32 hw_videoport, dispc_irq_t vpstat)  in dispc_k2g_vp_set_irqenable()  argument
539 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);  in dispc_k2g_vp_set_irqenable()
541 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_IRQENABLE, stat);  in dispc_k2g_vp_set_irqenable()
612 					      u32 hw_videoport)  in dispc_k3_vp_read_irqstatus()  argument
614 	u32 stat = dispc_read(dispc, DISPC_VP_IRQSTATUS(hw_videoport));  in dispc_k3_vp_read_irqstatus()
616 	return dispc_vp_irq_from_raw(stat, hw_videoport);  in dispc_k3_vp_read_irqstatus()
620 					u32 hw_videoport, dispc_irq_t vpstat)  in dispc_k3_vp_write_irqstatus()  argument
622 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);  in dispc_k3_vp_write_irqstatus()
624 	dispc_write(dispc, DISPC_VP_IRQSTATUS(hw_videoport), stat);  in dispc_k3_vp_write_irqstatus()
644 					      u32 hw_videoport)  in dispc_k3_vp_read_irqenable()  argument
646 	u32 stat = dispc_read(dispc, DISPC_VP_IRQENABLE(hw_videoport));  in dispc_k3_vp_read_irqenable()
648 	return dispc_vp_irq_from_raw(stat, hw_videoport);  in dispc_k3_vp_read_irqenable()
652 				      u32 hw_videoport, dispc_irq_t vpstat)  in dispc_k3_vp_set_irqenable()  argument
654 	u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport);  in dispc_k3_vp_set_irqenable()
656 	dispc_write(dispc, DISPC_VP_IRQENABLE(hw_videoport), stat);  in dispc_k3_vp_set_irqenable()
824 					       u32 hw_videoport,  in dispc_vp_find_bus_fmt()  argument
837 int dispc_vp_bus_check(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_bus_check()  argument
843 	fmt = dispc_vp_find_bus_fmt(dispc, hw_videoport, tstate->bus_format,  in dispc_vp_bus_check()
851 	if (dispc->feat->vp_bus_type[hw_videoport] != DISPC_VP_OLDI &&  in dispc_vp_bus_check()
854 			__func__, dispc->feat->vp_name[hw_videoport]);  in dispc_vp_bus_check()
881 				    u32 hw_videoport, int num_lines)  in dispc_set_num_datalines()  argument
903 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, v, 10, 8);  in dispc_set_num_datalines()
906 static void dispc_enable_oldi(struct dispc_device *dispc, u32 hw_videoport,  in dispc_enable_oldi()  argument
910 	u32 oldi_reset_bit = BIT(5 + hw_videoport);  in dispc_enable_oldi()
932 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_DSS_OLDI_CFG, oldi_cfg);  in dispc_enable_oldi()
943 void dispc_vp_prepare(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_prepare()  argument
949 	fmt = dispc_vp_find_bus_fmt(dispc, hw_videoport, tstate->bus_format,  in dispc_vp_prepare()
955 	if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) {  in dispc_vp_prepare()
958 		dispc_enable_oldi(dispc, hw_videoport, fmt);  in dispc_vp_prepare()
962 void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_enable()  argument
971 	fmt = dispc_vp_find_bus_fmt(dispc, hw_videoport, tstate->bus_format,  in dispc_vp_enable()
977 	dispc_set_num_datalines(dispc, hw_videoport, fmt->data_width);  in dispc_vp_enable()
987 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_TIMING_H,  in dispc_vp_enable()
992 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_TIMING_V,  in dispc_vp_enable()
1014 	if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI)  in dispc_vp_enable()
1017 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_POL_FREQ,  in dispc_vp_enable()
1026 	dispc_vp_write(dispc, hw_videoport, DISPC_VP_SIZE_SCREEN,  in dispc_vp_enable()
1030 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 0, 0);  in dispc_vp_enable()
1033 void dispc_vp_disable(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_disable()  argument
1035 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 0, 0, 0);  in dispc_vp_disable()
1038 void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_unprepare()  argument
1040 	if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) {  in dispc_vp_unprepare()
1041 		dispc_vp_write(dispc, hw_videoport, DISPC_VP_DSS_OLDI_CFG, 0);  in dispc_vp_unprepare()
1047 bool dispc_vp_go_busy(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_go_busy()  argument
1049 	return VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5);  in dispc_vp_go_busy()
1052 void dispc_vp_go(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_go()  argument
1054 	WARN_ON(VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5));  in dispc_vp_go()
1055 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 5, 5);  in dispc_vp_go()
1099 				       u32 hw_videoport, u32 default_color)  in dispc_vp_set_default_color()  argument
1105 	dispc_ovr_write(dispc, hw_videoport,  in dispc_vp_set_default_color()
1107 	dispc_ovr_write(dispc, hw_videoport,  in dispc_vp_set_default_color()
1112 					 u32 hw_videoport,  in dispc_vp_mode_valid()  argument
1119 	bus_type = dispc->feat->vp_bus_type[hw_videoport];  in dispc_vp_mode_valid()
1185 int dispc_vp_enable_clk(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_enable_clk()  argument
1187 	int ret = clk_prepare_enable(dispc->vp_clk[hw_videoport]);  in dispc_vp_enable_clk()
1196 void dispc_vp_disable_clk(struct dispc_device *dispc, u32 hw_videoport)  in dispc_vp_disable_clk()  argument
1198 	clk_disable_unprepare(dispc->vp_clk[hw_videoport]);  in dispc_vp_disable_clk()
1213 int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_set_clk_rate()  argument
1219 	r = clk_set_rate(dispc->vp_clk[hw_videoport], rate);  in dispc_vp_set_clk_rate()
1222 			hw_videoport, rate);  in dispc_vp_set_clk_rate()
1226 	new_rate = clk_get_rate(dispc->vp_clk[hw_videoport]);  in dispc_vp_set_clk_rate()
1231 			 hw_videoport, new_rate, rate);  in dispc_vp_set_clk_rate()
1234 		hw_videoport, clk_get_rate(dispc->vp_clk[hw_videoport]), rate);  in dispc_vp_set_clk_rate()
1241 				    u32 hw_plane, u32 hw_videoport,  in dispc_k2g_ovr_set_plane()  argument
1250 				      u32 hw_plane, u32 hw_videoport,  in dispc_am65x_ovr_set_plane()  argument
1253 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_am65x_ovr_set_plane()
1255 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_am65x_ovr_set_plane()
1257 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_am65x_ovr_set_plane()
1262 				      u32 hw_plane, u32 hw_videoport,  in dispc_j721e_ovr_set_plane()  argument
1265 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_j721e_ovr_set_plane()
1267 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(layer),  in dispc_j721e_ovr_set_plane()
1269 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(layer),  in dispc_j721e_ovr_set_plane()
1274 			 u32 hw_videoport, u32 x, u32 y, u32 layer)  in dispc_ovr_set_plane()  argument
1278 		dispc_k2g_ovr_set_plane(dispc, hw_plane, hw_videoport,  in dispc_ovr_set_plane()
1282 		dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport,  in dispc_ovr_set_plane()
1286 		dispc_j721e_ovr_set_plane(dispc, hw_plane, hw_videoport,  in dispc_ovr_set_plane()
1296 			    u32 hw_videoport, u32 layer, bool enable)  in dispc_ovr_enable_layer()  argument
1301 	OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),  in dispc_ovr_enable_layer()
1916 		      u32 hw_videoport)  in dispc_plane_check()  argument
1987 		      u32 hw_videoport)  in dispc_plane_setup()  argument
2238 					   u32 hw_videoport)  in dispc_k2g_vp_write_gamma_table()  argument
2240 	u32 *table = dispc->vp_data[hw_videoport].gamma_table;  in dispc_k2g_vp_write_gamma_table()
2244 	dev_dbg(dispc->dev, "%s: hw_videoport %d\n", __func__, hw_videoport);  in dispc_k2g_vp_write_gamma_table()
2254 		dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_GAMMA_TABLE,  in dispc_k2g_vp_write_gamma_table()
2260 					     u32 hw_videoport)  in dispc_am65x_vp_write_gamma_table()  argument
2262 	u32 *table = dispc->vp_data[hw_videoport].gamma_table;  in dispc_am65x_vp_write_gamma_table()
2266 	dev_dbg(dispc->dev, "%s: hw_videoport %d\n", __func__, hw_videoport);  in dispc_am65x_vp_write_gamma_table()
2276 		dispc_vp_write(dispc, hw_videoport, DISPC_VP_GAMMA_TABLE, v);  in dispc_am65x_vp_write_gamma_table()
2281 					     u32 hw_videoport)  in dispc_j721e_vp_write_gamma_table()  argument
2283 	u32 *table = dispc->vp_data[hw_videoport].gamma_table;  in dispc_j721e_vp_write_gamma_table()
2287 	dev_dbg(dispc->dev, "%s: hw_videoport %d\n", __func__, hw_videoport);  in dispc_j721e_vp_write_gamma_table()
2298 		dispc_vp_write(dispc, hw_videoport, DISPC_VP_GAMMA_TABLE, v);  in dispc_j721e_vp_write_gamma_table()
2303 				       u32 hw_videoport)  in dispc_vp_write_gamma_table()  argument
2307 		dispc_k2g_vp_write_gamma_table(dispc, hw_videoport);  in dispc_vp_write_gamma_table()
2310 		dispc_am65x_vp_write_gamma_table(dispc, hw_videoport);  in dispc_vp_write_gamma_table()
2313 		dispc_j721e_vp_write_gamma_table(dispc, hw_videoport);  in dispc_vp_write_gamma_table()
2327 			       u32 hw_videoport,  in dispc_vp_set_gamma()  argument
2331 	u32 *table = dispc->vp_data[hw_videoport].gamma_table;  in dispc_vp_set_gamma()
2337 		__func__, hw_videoport, length, hwlen);  in dispc_vp_set_gamma()
2373 	dispc_vp_write_gamma_table(dispc, hw_videoport);  in dispc_vp_set_gamma()
2420 static void dispc_k2g_vp_write_csc(struct dispc_device *dispc, u32 hw_videoport,  in dispc_k2g_vp_write_csc()  argument
2433 		dispc_vp_write(dispc, hw_videoport, dispc_vp_cpr_coef_reg[i],  in dispc_k2g_vp_write_csc()
2437 static void dispc_k2g_vp_set_ctm(struct dispc_device *dispc, u32 hw_videoport,  in dispc_k2g_vp_set_ctm()  argument
2446 		dispc_k2g_vp_write_csc(dispc, hw_videoport, &cpr);  in dispc_k2g_vp_set_ctm()
2450 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONFIG,  in dispc_k2g_vp_set_ctm()
2485 static void dispc_k3_vp_write_csc(struct dispc_device *dispc, u32 hw_videoport,  in dispc_k3_vp_write_csc()  argument
2499 		dispc_vp_write(dispc, hw_videoport, dispc_vp_csc_coef_reg[i],  in dispc_k3_vp_write_csc()
2503 static void dispc_k3_vp_set_ctm(struct dispc_device *dispc, u32 hw_videoport,  in dispc_k3_vp_set_ctm()  argument
2512 		dispc_k3_vp_write_csc(dispc, hw_videoport, &csc);  in dispc_k3_vp_set_ctm()
2516 	VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONFIG,  in dispc_k3_vp_set_ctm()
2521 				    u32 hw_videoport,  in dispc_vp_set_color_mgmt()  argument
2537 	dispc_vp_set_gamma(dispc, hw_videoport, lut, length);  in dispc_vp_set_color_mgmt()
2543 		dispc_k2g_vp_set_ctm(dispc, hw_videoport, ctm);  in dispc_vp_set_color_mgmt()
2545 		dispc_k3_vp_set_ctm(dispc, hw_videoport, ctm);  in dispc_vp_set_color_mgmt()
2548 void dispc_vp_setup(struct dispc_device *dispc, u32 hw_videoport,  in dispc_vp_setup()  argument
2551 	dispc_vp_set_default_color(dispc, hw_videoport, 0);  in dispc_vp_setup()
2552 	dispc_vp_set_color_mgmt(dispc, hw_videoport, state, newmodeset);  in dispc_vp_setup()