75 static inline u32 tegra_dpaux_readl(struct tegra_dpaux *dpaux,  in tegra_dpaux_readl()  argument
78 	u32 value = readl(dpaux->regs + (offset << 2));  in tegra_dpaux_readl()
80 	trace_dpaux_readl(dpaux->dev, offset, value);  in tegra_dpaux_readl()
85 static inline void tegra_dpaux_writel(struct tegra_dpaux *dpaux,  in tegra_dpaux_writel()  argument
88 	trace_dpaux_writel(dpaux->dev, offset, value);  in tegra_dpaux_writel()
89 	writel(value, dpaux->regs + (offset << 2));  in tegra_dpaux_writel()
92 static void tegra_dpaux_write_fifo(struct tegra_dpaux *dpaux, const u8 *buffer,  in tegra_dpaux_write_fifo()  argument
104 		tegra_dpaux_writel(dpaux, value, DPAUX_DP_AUXDATA_WRITE(i));  in tegra_dpaux_write_fifo()
108 static void tegra_dpaux_read_fifo(struct tegra_dpaux *dpaux, u8 *buffer,  in tegra_dpaux_read_fifo()  argument
117 		value = tegra_dpaux_readl(dpaux, DPAUX_DP_AUXDATA_READ(i));  in tegra_dpaux_read_fifo()
128 	struct tegra_dpaux *dpaux = to_dpaux(aux);  in tegra_dpaux_transfer()  local
195 	tegra_dpaux_writel(dpaux, msg->address, DPAUX_DP_AUXADDR);  in tegra_dpaux_transfer()
196 	tegra_dpaux_writel(dpaux, value, DPAUX_DP_AUXCTL);  in tegra_dpaux_transfer()
199 		tegra_dpaux_write_fifo(dpaux, msg->buffer, msg->size);  in tegra_dpaux_transfer()
204 	value = tegra_dpaux_readl(dpaux, DPAUX_DP_AUXCTL);  in tegra_dpaux_transfer()
206 	tegra_dpaux_writel(dpaux, value, DPAUX_DP_AUXCTL);  in tegra_dpaux_transfer()
208 	status = wait_for_completion_timeout(&dpaux->complete, timeout);  in tegra_dpaux_transfer()
213 	value = tegra_dpaux_readl(dpaux, DPAUX_DP_AUXSTAT);  in tegra_dpaux_transfer()
214 	tegra_dpaux_writel(dpaux, 0xf00, DPAUX_DP_AUXSTAT);  in tegra_dpaux_transfer()
260 			tegra_dpaux_read_fifo(dpaux, msg->buffer, count);  in tegra_dpaux_transfer()
273 	struct tegra_dpaux *dpaux = work_to_dpaux(work);  in tegra_dpaux_hotplug()  local
275 	if (dpaux->output)  in tegra_dpaux_hotplug()
276 		drm_helper_hpd_irq_event(dpaux->output->connector.dev);  in tegra_dpaux_hotplug()
281 	struct tegra_dpaux *dpaux = data;  in tegra_dpaux_irq()  local
286 	value = tegra_dpaux_readl(dpaux, DPAUX_INTR_AUX);  in tegra_dpaux_irq()
287 	tegra_dpaux_writel(dpaux, value, DPAUX_INTR_AUX);  in tegra_dpaux_irq()
290 		schedule_work(&dpaux->work);  in tegra_dpaux_irq()
297 		complete(&dpaux->complete);  in tegra_dpaux_irq()
308 static void tegra_dpaux_pad_power_down(struct tegra_dpaux *dpaux)  in tegra_dpaux_pad_power_down()  argument
310 	u32 value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);  in tegra_dpaux_pad_power_down()
314 	tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_SPARE);  in tegra_dpaux_pad_power_down()
317 static void tegra_dpaux_pad_power_up(struct tegra_dpaux *dpaux)  in tegra_dpaux_pad_power_up()  argument
319 	u32 value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);  in tegra_dpaux_pad_power_up()
323 	tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_SPARE);  in tegra_dpaux_pad_power_up()
326 static int tegra_dpaux_pad_config(struct tegra_dpaux *dpaux, unsigned function)  in tegra_dpaux_pad_config()  argument
332 		value = DPAUX_HYBRID_PADCTL_AUX_CMH(dpaux->soc->cmh) |  in tegra_dpaux_pad_config()
333 			DPAUX_HYBRID_PADCTL_AUX_DRVZ(dpaux->soc->drvz) |  in tegra_dpaux_pad_config()
334 			DPAUX_HYBRID_PADCTL_AUX_DRVI(dpaux->soc->drvi) |  in tegra_dpaux_pad_config()
342 			DPAUX_HYBRID_PADCTL_AUX_CMH(dpaux->soc->cmh) |  in tegra_dpaux_pad_config()
343 			DPAUX_HYBRID_PADCTL_AUX_DRVZ(dpaux->soc->drvz) |  in tegra_dpaux_pad_config()
344 			DPAUX_HYBRID_PADCTL_AUX_DRVI(dpaux->soc->drvi) |  in tegra_dpaux_pad_config()
349 		tegra_dpaux_pad_power_down(dpaux);  in tegra_dpaux_pad_config()
356 	tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_PADCTL);  in tegra_dpaux_pad_config()
357 	tegra_dpaux_pad_power_up(dpaux);  in tegra_dpaux_pad_config()
434 	struct tegra_dpaux *dpaux = pinctrl_dev_get_drvdata(pinctrl);  in tegra_dpaux_set_mux()  local
436 	return tegra_dpaux_pad_config(dpaux, function);  in tegra_dpaux_set_mux()
449 	struct tegra_dpaux *dpaux;  in tegra_dpaux_probe()  local
454 	dpaux = devm_kzalloc(&pdev->dev, sizeof(*dpaux), GFP_KERNEL);  in tegra_dpaux_probe()
455 	if (!dpaux)  in tegra_dpaux_probe()
458 	dpaux->soc = of_device_get_match_data(&pdev->dev);  in tegra_dpaux_probe()
459 	INIT_WORK(&dpaux->work, tegra_dpaux_hotplug);  in tegra_dpaux_probe()
460 	init_completion(&dpaux->complete);  in tegra_dpaux_probe()
461 	INIT_LIST_HEAD(&dpaux->list);  in tegra_dpaux_probe()
462 	dpaux->dev = &pdev->dev;  in tegra_dpaux_probe()
465 	dpaux->regs = devm_ioremap_resource(&pdev->dev, regs);  in tegra_dpaux_probe()
466 	if (IS_ERR(dpaux->regs))  in tegra_dpaux_probe()
467 		return PTR_ERR(dpaux->regs);  in tegra_dpaux_probe()
469 	dpaux->irq = platform_get_irq(pdev, 0);  in tegra_dpaux_probe()
470 	if (dpaux->irq < 0) {  in tegra_dpaux_probe()
476 		dpaux->rst = devm_reset_control_get(&pdev->dev, "dpaux");  in tegra_dpaux_probe()
477 		if (IS_ERR(dpaux->rst)) {  in tegra_dpaux_probe()
480 				PTR_ERR(dpaux->rst));  in tegra_dpaux_probe()
481 			return PTR_ERR(dpaux->rst);  in tegra_dpaux_probe()
485 	dpaux->clk = devm_clk_get(&pdev->dev, NULL);  in tegra_dpaux_probe()
486 	if (IS_ERR(dpaux->clk)) {  in tegra_dpaux_probe()
488 			PTR_ERR(dpaux->clk));  in tegra_dpaux_probe()
489 		return PTR_ERR(dpaux->clk);  in tegra_dpaux_probe()
492 	dpaux->clk_parent = devm_clk_get(&pdev->dev, "parent");  in tegra_dpaux_probe()
493 	if (IS_ERR(dpaux->clk_parent)) {  in tegra_dpaux_probe()
495 			PTR_ERR(dpaux->clk_parent));  in tegra_dpaux_probe()
496 		return PTR_ERR(dpaux->clk_parent);  in tegra_dpaux_probe()
499 	err = clk_set_rate(dpaux->clk_parent, 270000000);  in tegra_dpaux_probe()
506 	dpaux->vdd = devm_regulator_get_optional(&pdev->dev, "vdd");  in tegra_dpaux_probe()
507 	if (IS_ERR(dpaux->vdd)) {  in tegra_dpaux_probe()
508 		if (PTR_ERR(dpaux->vdd) != -ENODEV) {  in tegra_dpaux_probe()
509 			if (PTR_ERR(dpaux->vdd) != -EPROBE_DEFER)  in tegra_dpaux_probe()
512 					PTR_ERR(dpaux->vdd));  in tegra_dpaux_probe()
514 			return PTR_ERR(dpaux->vdd);  in tegra_dpaux_probe()
517 		dpaux->vdd = NULL;  in tegra_dpaux_probe()
520 	platform_set_drvdata(pdev, dpaux);  in tegra_dpaux_probe()
524 	err = devm_request_irq(dpaux->dev, dpaux->irq, tegra_dpaux_irq, 0,  in tegra_dpaux_probe()
525 			       dev_name(dpaux->dev), dpaux);  in tegra_dpaux_probe()
527 		dev_err(dpaux->dev, "failed to request IRQ#%u: %d\n",  in tegra_dpaux_probe()
528 			dpaux->irq, err);  in tegra_dpaux_probe()
532 	disable_irq(dpaux->irq);  in tegra_dpaux_probe()
534 	dpaux->aux.transfer = tegra_dpaux_transfer;  in tegra_dpaux_probe()
535 	dpaux->aux.dev = &pdev->dev;  in tegra_dpaux_probe()
537 	err = drm_dp_aux_register(&dpaux->aux);  in tegra_dpaux_probe()
549 	err = tegra_dpaux_pad_config(dpaux, DPAUX_PADCTL_FUNC_I2C);  in tegra_dpaux_probe()
554 	dpaux->desc.name = dev_name(&pdev->dev);  in tegra_dpaux_probe()
555 	dpaux->desc.pins = tegra_dpaux_pins;  in tegra_dpaux_probe()
556 	dpaux->desc.npins = ARRAY_SIZE(tegra_dpaux_pins);  in tegra_dpaux_probe()
557 	dpaux->desc.pctlops = &tegra_dpaux_pinctrl_ops;  in tegra_dpaux_probe()
558 	dpaux->desc.pmxops = &tegra_dpaux_pinmux_ops;  in tegra_dpaux_probe()
559 	dpaux->desc.owner = THIS_MODULE;  in tegra_dpaux_probe()
561 	dpaux->pinctrl = devm_pinctrl_register(&pdev->dev, &dpaux->desc, dpaux);  in tegra_dpaux_probe()
562 	if (IS_ERR(dpaux->pinctrl)) {  in tegra_dpaux_probe()
564 		return PTR_ERR(dpaux->pinctrl);  in tegra_dpaux_probe()
570 	tegra_dpaux_writel(dpaux, value, DPAUX_INTR_EN_AUX);  in tegra_dpaux_probe()
571 	tegra_dpaux_writel(dpaux, value, DPAUX_INTR_AUX);  in tegra_dpaux_probe()
574 	list_add_tail(&dpaux->list, &dpaux_list);  in tegra_dpaux_probe()
582 	struct tegra_dpaux *dpaux = platform_get_drvdata(pdev);  in tegra_dpaux_remove()  local
584 	cancel_work_sync(&dpaux->work);  in tegra_dpaux_remove()
587 	tegra_dpaux_pad_power_down(dpaux);  in tegra_dpaux_remove()
592 	drm_dp_aux_unregister(&dpaux->aux);  in tegra_dpaux_remove()
595 	list_del(&dpaux->list);  in tegra_dpaux_remove()
604 	struct tegra_dpaux *dpaux = dev_get_drvdata(dev);  in tegra_dpaux_suspend()  local
607 	if (dpaux->rst) {  in tegra_dpaux_suspend()
608 		err = reset_control_assert(dpaux->rst);  in tegra_dpaux_suspend()
617 	clk_disable_unprepare(dpaux->clk_parent);  in tegra_dpaux_suspend()
618 	clk_disable_unprepare(dpaux->clk);  in tegra_dpaux_suspend()
625 	struct tegra_dpaux *dpaux = dev_get_drvdata(dev);  in tegra_dpaux_resume()  local
628 	err = clk_prepare_enable(dpaux->clk);  in tegra_dpaux_resume()
634 	err = clk_prepare_enable(dpaux->clk_parent);  in tegra_dpaux_resume()
642 	if (dpaux->rst) {  in tegra_dpaux_resume()
643 		err = reset_control_deassert(dpaux->rst);  in tegra_dpaux_resume()
655 	clk_disable_unprepare(dpaux->clk_parent);  in tegra_dpaux_resume()
657 	clk_disable_unprepare(dpaux->clk);  in tegra_dpaux_resume()
705 	struct tegra_dpaux *dpaux;  in drm_dp_aux_find_by_of_node()  local
709 	list_for_each_entry(dpaux, &dpaux_list, list)  in drm_dp_aux_find_by_of_node()
710 		if (np == dpaux->dev->of_node) {  in drm_dp_aux_find_by_of_node()
712 			return &dpaux->aux;  in drm_dp_aux_find_by_of_node()
722 	struct tegra_dpaux *dpaux = to_dpaux(aux);  in drm_dp_aux_attach()  local
727 	dpaux->output = output;  in drm_dp_aux_attach()
732 		if (dpaux->vdd) {  in drm_dp_aux_attach()
733 			err = regulator_enable(dpaux->vdd);  in drm_dp_aux_attach()
753 	enable_irq(dpaux->irq);  in drm_dp_aux_attach()
759 	struct tegra_dpaux *dpaux = to_dpaux(aux);  in drm_dp_aux_detach()  local
763 	disable_irq(dpaux->irq);  in drm_dp_aux_detach()
765 	if (dpaux->output->panel) {  in drm_dp_aux_detach()
768 		if (dpaux->vdd) {  in drm_dp_aux_detach()
769 			err = regulator_disable(dpaux->vdd);  in drm_dp_aux_detach()
788 		dpaux->output = NULL;  in drm_dp_aux_detach()
796 	struct tegra_dpaux *dpaux = to_dpaux(aux);  in drm_dp_aux_detect()  local
799 	value = tegra_dpaux_readl(dpaux, DPAUX_DP_AUXSTAT);  in drm_dp_aux_detect()
809 	struct tegra_dpaux *dpaux = to_dpaux(aux);  in drm_dp_aux_enable()  local
811 	return tegra_dpaux_pad_config(dpaux, DPAUX_PADCTL_FUNC_AUX);  in drm_dp_aux_enable()
816 	struct tegra_dpaux *dpaux = to_dpaux(aux);  in drm_dp_aux_disable()  local
818 	tegra_dpaux_pad_power_down(dpaux);  in drm_dp_aux_disable()