Lines Matching refs:tegra_dc_readl
48 value = tegra_dc_readl(dc, offset); in tegra_dc_readl_active()
80 return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset)); in tegra_plane_readl()
906 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_cursor_atomic_update()
910 value = tegra_dc_readl(dc, DC_DISP_BLEND_CURSOR_CONTROL); in tegra_cursor_atomic_update()
937 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_cursor_atomic_disable()
1463 offset, tegra_dc_readl(dc, offset)); in tegra_dc_show_regs()
1492 value = tegra_dc_readl(dc, DC_COM_CRC_CHECKSUM); in tegra_dc_show_crc()
1575 value = tegra_dc_readl(dc, DC_CMD_INT_MASK); in tegra_dc_enable_vblank()
1587 value = tegra_dc_readl(dc, DC_CMD_INT_MASK); in tegra_dc_disable_vblank()
1713 value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND); in tegra_dc_stop()
1778 value = tegra_dc_readl(dc, DC_CMD_DISPLAY_POWER_CONTROL); in tegra_crtc_atomic_disable()
1892 value = tegra_dc_readl(dc, DC_DISP_INTERLACE_CONTROL); in tegra_crtc_atomic_enable()
1897 value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND); in tegra_crtc_atomic_enable()
1903 value = tegra_dc_readl(dc, DC_CMD_DISPLAY_POWER_CONTROL); in tegra_crtc_atomic_enable()
1948 value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_crtc_atomic_flush()
1952 value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_crtc_atomic_flush()
1967 status = tegra_dc_readl(dc, DC_CMD_INT_STATUS); in tegra_dc_irq()