34 	/* backend <-> TCON muxing selection done in backend */
80 void sun4i_backend_layer_enable(struct sun4i_backend *backend,  in sun4i_backend_layer_enable()  argument
93 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG,  in sun4i_backend_layer_enable()
168 int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,  in sun4i_backend_update_layer_coord()  argument
178 		regmap_write(backend->engine.regs, SUN4I_BACKEND_DISSIZE_REG,  in sun4i_backend_update_layer_coord()
186 	regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYSIZE_REG(layer),  in sun4i_backend_update_layer_coord()
193 	regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYCOOR_REG(layer),  in sun4i_backend_update_layer_coord()
200 static int sun4i_backend_update_yuv_format(struct sun4i_backend *backend,  in sun4i_backend_update_yuv_format()  argument
211 		regmap_write(backend->engine.regs,  in sun4i_backend_update_yuv_format()
219 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer),  in sun4i_backend_update_yuv_format()
252 	regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVCTL_REG, val);  in sun4i_backend_update_yuv_format()
257 int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,  in sun4i_backend_update_layer_formats()  argument
267 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer),  in sun4i_backend_update_layer_formats()
274 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG,  in sun4i_backend_update_layer_formats()
278 	DRM_DEBUG_DRIVER("Switching display backend interlaced mode %s\n",  in sun4i_backend_update_layer_formats()
284 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_update_layer_formats()
291 		return sun4i_backend_update_yuv_format(backend, layer, plane);  in sun4i_backend_update_layer_formats()
299 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_update_layer_formats()
306 int sun4i_backend_update_layer_frontend(struct sun4i_backend *backend,  in sun4i_backend_update_layer_frontend()  argument
318 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_update_layer_frontend()
323 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_update_layer_frontend()
330 static int sun4i_backend_update_yuv_buffer(struct sun4i_backend *backend,  in sun4i_backend_update_yuv_buffer()  argument
336 	regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVADD_REG(0), paddr);  in sun4i_backend_update_yuv_buffer()
339 	regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVLINEWIDTH_REG(0),  in sun4i_backend_update_yuv_buffer()
345 int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,  in sun4i_backend_update_layer_buffer()  argument
355 	regmap_write(backend->engine.regs,  in sun4i_backend_update_layer_buffer()
364 		return sun4i_backend_update_yuv_buffer(backend, fb, paddr);  in sun4i_backend_update_layer_buffer()
369 	regmap_write(backend->engine.regs,  in sun4i_backend_update_layer_buffer()
376 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_LAYFB_H4ADD_REG,  in sun4i_backend_update_layer_buffer()
383 int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend, int layer,  in sun4i_backend_update_layer_zpos()  argument
393 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer),  in sun4i_backend_update_layer_zpos()
402 void sun4i_backend_cleanup_layer(struct sun4i_backend *backend,  in sun4i_backend_cleanup_layer()  argument
405 	regmap_update_bits(backend->engine.regs,  in sun4i_backend_cleanup_layer()
428 	struct sun4i_backend *backend = layer->backend;  in sun4i_backend_plane_uses_frontend()  local
432 	if (IS_ERR(backend->frontend))  in sun4i_backend_plane_uses_frontend()
442 	 * TODO: The backend alone allows 2x and 4x integer scaling, including  in sun4i_backend_plane_uses_frontend()
444 	 * Use the backend directly instead of the frontend in this case, with  in sun4i_backend_plane_uses_frontend()
452 	 * Here the format is supported by both the frontend and the backend  in sun4i_backend_plane_uses_frontend()
453 	 * and no frontend scaling is required, so use the backend directly.  in sun4i_backend_plane_uses_frontend()
490 	struct sun4i_backend *backend = engine_to_sun4i_backend(engine);  in sun4i_backend_atomic_check()  local
583 	if (backend->quirks->supports_lowest_plane_alpha)  in sun4i_backend_atomic_check()
592 	if (!backend->quirks->supports_lowest_plane_alpha &&  in sun4i_backend_atomic_check()
631 	struct sun4i_backend *backend = engine_to_sun4i_backend(engine);  in sun4i_backend_vblank_quirk()  local
632 	struct sun4i_frontend *frontend = backend->frontend;  in sun4i_backend_vblank_quirk()
642 	 * This is due to the fact that the backend will not take into  in sun4i_backend_vblank_quirk()
651 	spin_lock(&backend->frontend_lock);  in sun4i_backend_vblank_quirk()
652 	if (backend->frontend_teardown) {  in sun4i_backend_vblank_quirk()
654 		backend->frontend_teardown = false;  in sun4i_backend_vblank_quirk()
656 	spin_unlock(&backend->frontend_lock);  in sun4i_backend_vblank_quirk()
660 	struct sun4i_backend *backend = dev_get_drvdata(dev);  in sun4i_backend_init_sat()  local
663 	backend->sat_reset = devm_reset_control_get(dev, "sat");  in sun4i_backend_init_sat()
664 	if (IS_ERR(backend->sat_reset)) {  in sun4i_backend_init_sat()
666 		return PTR_ERR(backend->sat_reset);  in sun4i_backend_init_sat()
669 	ret = reset_control_deassert(backend->sat_reset);  in sun4i_backend_init_sat()
675 	backend->sat_clk = devm_clk_get(dev, "sat");  in sun4i_backend_init_sat()
676 	if (IS_ERR(backend->sat_clk)) {  in sun4i_backend_init_sat()
678 		ret = PTR_ERR(backend->sat_clk);  in sun4i_backend_init_sat()
682 	ret = clk_prepare_enable(backend->sat_clk);  in sun4i_backend_init_sat()
691 	reset_control_assert(backend->sat_reset);  in sun4i_backend_init_sat()
696 	struct sun4i_backend *backend = dev_get_drvdata(dev);  in sun4i_backend_free_sat()  local
698 	clk_disable_unprepare(backend->sat_clk);  in sun4i_backend_free_sat()
699 	reset_control_assert(backend->sat_reset);  in sun4i_backend_free_sat()
705  * The display backend can take video output from the display frontend, or
708  * tree with of_graph, and we use it here to figure out which backend, if
785 	struct sun4i_backend *backend;  in sun4i_backend_bind()  local
791 	backend = devm_kzalloc(dev, sizeof(*backend), GFP_KERNEL);  in sun4i_backend_bind()
792 	if (!backend)  in sun4i_backend_bind()
794 	dev_set_drvdata(dev, backend);  in sun4i_backend_bind()
795 	spin_lock_init(&backend->frontend_lock);  in sun4i_backend_bind()
829 	backend->engine.node = dev->of_node;  in sun4i_backend_bind()
830 	backend->engine.ops = &sun4i_backend_engine_ops;  in sun4i_backend_bind()
831 	backend->engine.id = sun4i_backend_of_get_id(dev->of_node);  in sun4i_backend_bind()
832 	if (backend->engine.id < 0)  in sun4i_backend_bind()
833 		return backend->engine.id;  in sun4i_backend_bind()
835 	backend->frontend = sun4i_backend_find_frontend(drv, dev->of_node);  in sun4i_backend_bind()
836 	if (IS_ERR(backend->frontend))  in sun4i_backend_bind()
844 	backend->reset = devm_reset_control_get(dev, NULL);  in sun4i_backend_bind()
845 	if (IS_ERR(backend->reset)) {  in sun4i_backend_bind()
847 		return PTR_ERR(backend->reset);  in sun4i_backend_bind()
850 	ret = reset_control_deassert(backend->reset);  in sun4i_backend_bind()
856 	backend->bus_clk = devm_clk_get(dev, "ahb");  in sun4i_backend_bind()
857 	if (IS_ERR(backend->bus_clk)) {  in sun4i_backend_bind()
858 		dev_err(dev, "Couldn't get the backend bus clock\n");  in sun4i_backend_bind()
859 		ret = PTR_ERR(backend->bus_clk);  in sun4i_backend_bind()
862 	clk_prepare_enable(backend->bus_clk);  in sun4i_backend_bind()
864 	backend->mod_clk = devm_clk_get(dev, "mod");  in sun4i_backend_bind()
865 	if (IS_ERR(backend->mod_clk)) {  in sun4i_backend_bind()
866 		dev_err(dev, "Couldn't get the backend module clock\n");  in sun4i_backend_bind()
867 		ret = PTR_ERR(backend->mod_clk);  in sun4i_backend_bind()
871 	ret = clk_set_rate_exclusive(backend->mod_clk, 300000000);  in sun4i_backend_bind()
877 	clk_prepare_enable(backend->mod_clk);  in sun4i_backend_bind()
879 	backend->ram_clk = devm_clk_get(dev, "ram");  in sun4i_backend_bind()
880 	if (IS_ERR(backend->ram_clk)) {  in sun4i_backend_bind()
881 		dev_err(dev, "Couldn't get the backend RAM clock\n");  in sun4i_backend_bind()
882 		ret = PTR_ERR(backend->ram_clk);  in sun4i_backend_bind()
885 	clk_prepare_enable(backend->ram_clk);  in sun4i_backend_bind()
888 				    "allwinner,sun8i-a33-display-backend")) {  in sun4i_backend_bind()
896 	backend->engine.regs = devm_regmap_init_mmio(dev, regs,  in sun4i_backend_bind()
898 	if (IS_ERR(backend->engine.regs)) {  in sun4i_backend_bind()
899 		dev_err(dev, "Couldn't create the backend regmap\n");  in sun4i_backend_bind()
900 		return PTR_ERR(backend->engine.regs);  in sun4i_backend_bind()
903 	list_add_tail(&backend->engine.list, &drv->engine_list);  in sun4i_backend_bind()
906 	 * Many of the backend's layer configuration registers have  in sun4i_backend_bind()
914 		regmap_write(backend->engine.regs, i, 0);  in sun4i_backend_bind()
917 	regmap_write(backend->engine.regs, SUN4I_BACKEND_REGBUFFCTL_REG,  in sun4i_backend_bind()
920 	/* Enable the backend */  in sun4i_backend_bind()
921 	regmap_write(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG,  in sun4i_backend_bind()
930 		 * and TCONs, so we select the backend with same ID.  in sun4i_backend_bind()
938 		regmap_update_bits(backend->engine.regs,  in sun4i_backend_bind()
941 				   (backend->engine.id  in sun4i_backend_bind()
946 	backend->quirks = quirks;  in sun4i_backend_bind()
951 	clk_disable_unprepare(backend->ram_clk);  in sun4i_backend_bind()
953 	clk_rate_exclusive_put(backend->mod_clk);  in sun4i_backend_bind()
954 	clk_disable_unprepare(backend->mod_clk);  in sun4i_backend_bind()
956 	clk_disable_unprepare(backend->bus_clk);  in sun4i_backend_bind()
958 	reset_control_assert(backend->reset);  in sun4i_backend_bind()
965 	struct sun4i_backend *backend = dev_get_drvdata(dev);  in sun4i_backend_unbind()  local
967 	list_del(&backend->engine.list);  in sun4i_backend_unbind()
970 				    "allwinner,sun8i-a33-display-backend"))  in sun4i_backend_unbind()
973 	clk_disable_unprepare(backend->ram_clk);  in sun4i_backend_unbind()
974 	clk_rate_exclusive_put(backend->mod_clk);  in sun4i_backend_unbind()
975 	clk_disable_unprepare(backend->mod_clk);  in sun4i_backend_unbind()
976 	clk_disable_unprepare(backend->bus_clk);  in sun4i_backend_unbind()
977 	reset_control_assert(backend->reset);  in sun4i_backend_unbind()
1020 		.compatible = "allwinner,sun4i-a10-display-backend",
1024 		.compatible = "allwinner,sun5i-a13-display-backend",
1028 		.compatible = "allwinner,sun6i-a31-display-backend",
1032 		.compatible = "allwinner,sun7i-a20-display-backend",
1036 		.compatible = "allwinner,sun8i-a23-display-backend",
1040 		.compatible = "allwinner,sun8i-a33-display-backend",
1044 		.compatible = "allwinner,sun9i-a80-display-backend",
1055 		.name		= "sun4i-backend",
1062 MODULE_DESCRIPTION("Allwinner A10 Display Backend Driver");