Lines Matching full:vop
42 #define VOP_WIN_SET(vop, win, name, v) \ argument
43 vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
44 #define VOP_SCL_SET(vop, win, name, v) \ argument
45 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
46 #define VOP_SCL_SET_EXT(vop, win, name, v) \ argument
47 vop_reg_set(vop, &win->phy->scl->ext->name, \
50 #define VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, name, v) \ argument
53 vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \
56 #define VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, win_yuv2yuv, name, v) \ argument
59 vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \
62 #define VOP_INTR_SET_MASK(vop, name, mask, v) \ argument
63 vop_reg_set(vop, &vop->data->intr->name, 0, mask, v, #name)
65 #define VOP_REG_SET(vop, group, name, v) \ argument
66 vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name)
68 #define VOP_INTR_SET_TYPE(vop, name, type, v) \ argument
71 for (i = 0; i < vop->data->intr->nintrs; i++) { \
72 if (vop->data->intr->intrs[i] & type) { \
77 VOP_INTR_SET_MASK(vop, name, mask, reg); \
79 #define VOP_INTR_GET_TYPE(vop, name, type) \ argument
80 vop_get_intr_type(vop, &vop->data->intr->name, type)
82 #define VOP_WIN_GET(vop, win, name) \ argument
83 vop_read_reg(vop, win->base, &win->phy->name)
88 #define VOP_WIN_GET_YRGBADDR(vop, win) \ argument
89 vop_readl(vop, win->base + win->phy->yrgb_mst.offset)
92 ((vop_win) - (vop_win)->vop->win)
94 #define VOP_AFBC_SET(vop, name, v) \ argument
96 if ((vop)->data->afbc) \
97 vop_reg_set((vop), &(vop)->data->afbc->name, \
101 #define to_vop(x) container_of(x, struct vop, crtc)
130 struct vop *vop; member
134 struct vop { struct
157 /* physical map length of vop register */ argument
162 /* lock vop irq reg */ argument
169 /* vop AHP clk */ argument
171 /* vop dclk */ argument
173 /* vop share memory frequency */ argument
176 /* vop dclk reset */ argument
185 static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v) in vop_writel() argument
187 writel(v, vop->regs + offset); in vop_writel()
188 vop->regsbak[offset >> 2] = v; in vop_writel()
191 static inline uint32_t vop_readl(struct vop *vop, uint32_t offset) in vop_readl() argument
193 return readl(vop->regs + offset); in vop_readl()
196 static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base, in vop_read_reg() argument
199 return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask; in vop_read_reg()
202 static void vop_reg_set(struct vop *vop, const struct vop_reg *reg, in vop_reg_set() argument
209 DRM_DEV_DEBUG(vop->dev, "Warning: not support %s\n", reg_name); in vop_reg_set()
220 uint32_t cached_val = vop->regsbak[offset >> 2]; in vop_reg_set()
223 vop->regsbak[offset >> 2] = v; in vop_reg_set()
227 writel_relaxed(v, vop->regs + offset); in vop_reg_set()
229 writel(v, vop->regs + offset); in vop_reg_set()
232 static inline uint32_t vop_get_intr_type(struct vop *vop, in vop_get_intr_type() argument
236 uint32_t regs = vop_read_reg(vop, 0, reg); in vop_get_intr_type()
238 for (i = 0; i < vop->data->intr->nintrs; i++) { in vop_get_intr_type()
239 if ((type & vop->data->intr->intrs[i]) && (regs & 1 << i)) in vop_get_intr_type()
240 ret |= vop->data->intr->intrs[i]; in vop_get_intr_type()
246 static inline void vop_cfg_done(struct vop *vop) in vop_cfg_done() argument
248 VOP_REG_SET(vop, common, cfg_done, 1); in vop_cfg_done()
347 static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, in scl_vop_cal_scl_fac() argument
366 DRM_DEV_ERROR(vop->dev, "Maximum dst width (3840) exceeded\n"); in scl_vop_cal_scl_fac()
371 VOP_SCL_SET(vop, win, scale_yrgb_x, in scl_vop_cal_scl_fac()
373 VOP_SCL_SET(vop, win, scale_yrgb_y, in scl_vop_cal_scl_fac()
376 VOP_SCL_SET(vop, win, scale_cbcr_x, in scl_vop_cal_scl_fac()
378 VOP_SCL_SET(vop, win, scale_cbcr_y, in scl_vop_cal_scl_fac()
401 VOP_SCL_SET_EXT(vop, win, lb_mode, lb_mode); in scl_vop_cal_scl_fac()
404 DRM_DEV_ERROR(vop->dev, "not allow yrgb ver scale\n"); in scl_vop_cal_scl_fac()
408 DRM_DEV_ERROR(vop->dev, "not allow cbcr ver scale\n"); in scl_vop_cal_scl_fac()
420 VOP_SCL_SET(vop, win, scale_yrgb_x, val); in scl_vop_cal_scl_fac()
423 VOP_SCL_SET(vop, win, scale_yrgb_y, val); in scl_vop_cal_scl_fac()
425 VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt4, vskiplines == 4); in scl_vop_cal_scl_fac()
426 VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt2, vskiplines == 2); in scl_vop_cal_scl_fac()
428 VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, yrgb_hor_scl_mode); in scl_vop_cal_scl_fac()
429 VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, yrgb_ver_scl_mode); in scl_vop_cal_scl_fac()
430 VOP_SCL_SET_EXT(vop, win, yrgb_hsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
431 VOP_SCL_SET_EXT(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
432 VOP_SCL_SET_EXT(vop, win, yrgb_vsu_mode, vsu_mode); in scl_vop_cal_scl_fac()
436 VOP_SCL_SET(vop, win, scale_cbcr_x, val); in scl_vop_cal_scl_fac()
439 VOP_SCL_SET(vop, win, scale_cbcr_y, val); in scl_vop_cal_scl_fac()
441 VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt4, vskiplines == 4); in scl_vop_cal_scl_fac()
442 VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt2, vskiplines == 2); in scl_vop_cal_scl_fac()
443 VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, cbcr_hor_scl_mode); in scl_vop_cal_scl_fac()
444 VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, cbcr_ver_scl_mode); in scl_vop_cal_scl_fac()
445 VOP_SCL_SET_EXT(vop, win, cbcr_hsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
446 VOP_SCL_SET_EXT(vop, win, cbcr_vsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
447 VOP_SCL_SET_EXT(vop, win, cbcr_vsu_mode, vsu_mode); in scl_vop_cal_scl_fac()
451 static void vop_dsp_hold_valid_irq_enable(struct vop *vop) in vop_dsp_hold_valid_irq_enable() argument
455 if (WARN_ON(!vop->is_enabled)) in vop_dsp_hold_valid_irq_enable()
458 spin_lock_irqsave(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_enable()
460 VOP_INTR_SET_TYPE(vop, clear, DSP_HOLD_VALID_INTR, 1); in vop_dsp_hold_valid_irq_enable()
461 VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 1); in vop_dsp_hold_valid_irq_enable()
463 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_enable()
466 static void vop_dsp_hold_valid_irq_disable(struct vop *vop) in vop_dsp_hold_valid_irq_disable() argument
470 if (WARN_ON(!vop->is_enabled)) in vop_dsp_hold_valid_irq_disable()
473 spin_lock_irqsave(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_disable()
475 VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 0); in vop_dsp_hold_valid_irq_disable()
477 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_disable()
502 static bool vop_line_flag_irq_is_enabled(struct vop *vop) in vop_line_flag_irq_is_enabled() argument
507 spin_lock_irqsave(&vop->irq_lock, flags); in vop_line_flag_irq_is_enabled()
509 line_flag_irq = VOP_INTR_GET_TYPE(vop, enable, LINE_FLAG_INTR); in vop_line_flag_irq_is_enabled()
511 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_line_flag_irq_is_enabled()
516 static void vop_line_flag_irq_enable(struct vop *vop) in vop_line_flag_irq_enable() argument
520 if (WARN_ON(!vop->is_enabled)) in vop_line_flag_irq_enable()
523 spin_lock_irqsave(&vop->irq_lock, flags); in vop_line_flag_irq_enable()
525 VOP_INTR_SET_TYPE(vop, clear, LINE_FLAG_INTR, 1); in vop_line_flag_irq_enable()
526 VOP_INTR_SET_TYPE(vop, enable, LINE_FLAG_INTR, 1); in vop_line_flag_irq_enable()
528 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_line_flag_irq_enable()
531 static void vop_line_flag_irq_disable(struct vop *vop) in vop_line_flag_irq_disable() argument
535 if (WARN_ON(!vop->is_enabled)) in vop_line_flag_irq_disable()
538 spin_lock_irqsave(&vop->irq_lock, flags); in vop_line_flag_irq_disable()
540 VOP_INTR_SET_TYPE(vop, enable, LINE_FLAG_INTR, 0); in vop_line_flag_irq_disable()
542 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_line_flag_irq_disable()
545 static int vop_core_clks_enable(struct vop *vop) in vop_core_clks_enable() argument
549 ret = clk_enable(vop->hclk); in vop_core_clks_enable()
553 ret = clk_enable(vop->aclk); in vop_core_clks_enable()
560 clk_disable(vop->hclk); in vop_core_clks_enable()
564 static void vop_core_clks_disable(struct vop *vop) in vop_core_clks_disable() argument
566 clk_disable(vop->aclk); in vop_core_clks_disable()
567 clk_disable(vop->hclk); in vop_core_clks_disable()
570 static void vop_win_disable(struct vop *vop, const struct vop_win *vop_win) in vop_win_disable() argument
575 VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, SCALE_NONE); in vop_win_disable()
576 VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, SCALE_NONE); in vop_win_disable()
577 VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, SCALE_NONE); in vop_win_disable()
578 VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, SCALE_NONE); in vop_win_disable()
581 VOP_WIN_SET(vop, win, enable, 0); in vop_win_disable()
582 vop->win_enabled &= ~BIT(VOP_WIN_TO_INDEX(vop_win)); in vop_win_disable()
587 struct vop *vop = to_vop(crtc); in vop_enable() local
590 ret = pm_runtime_get_sync(vop->dev); in vop_enable()
592 DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret); in vop_enable()
596 ret = vop_core_clks_enable(vop); in vop_enable()
600 ret = clk_enable(vop->dclk); in vop_enable()
605 * Slave iommu shares power, irq and clock with vop. It was associated in vop_enable()
610 ret = rockchip_drm_dma_attach_device(vop->drm_dev, vop->dev); in vop_enable()
612 DRM_DEV_ERROR(vop->dev, in vop_enable()
617 spin_lock(&vop->reg_lock); in vop_enable()
618 for (i = 0; i < vop->len; i += 4) in vop_enable()
619 writel_relaxed(vop->regsbak[i / 4], vop->regs + i); in vop_enable()
631 for (i = 0; i < vop->data->win_size; i++) { in vop_enable()
632 struct vop_win *vop_win = &vop->win[i]; in vop_enable()
634 vop_win_disable(vop, vop_win); in vop_enable()
638 if (vop->data->afbc) { in vop_enable()
641 * Disable AFBC and forget there was a vop window with AFBC in vop_enable()
643 VOP_AFBC_SET(vop, enable, 0); in vop_enable()
648 vop_cfg_done(vop); in vop_enable()
650 spin_unlock(&vop->reg_lock); in vop_enable()
653 * At here, vop clock & iommu is enable, R/W vop regs would be safe. in vop_enable()
655 vop->is_enabled = true; in vop_enable()
657 spin_lock(&vop->reg_lock); in vop_enable()
659 VOP_REG_SET(vop, common, standby, 1); in vop_enable()
661 spin_unlock(&vop->reg_lock); in vop_enable()
668 clk_disable(vop->dclk); in vop_enable()
670 vop_core_clks_disable(vop); in vop_enable()
672 pm_runtime_put_sync(vop->dev); in vop_enable()
678 struct vop *vop = to_vop(crtc); in rockchip_drm_set_win_enabled() local
681 spin_lock(&vop->reg_lock); in rockchip_drm_set_win_enabled()
683 for (i = 0; i < vop->data->win_size; i++) { in rockchip_drm_set_win_enabled()
684 struct vop_win *vop_win = &vop->win[i]; in rockchip_drm_set_win_enabled()
687 VOP_WIN_SET(vop, win, enable, in rockchip_drm_set_win_enabled()
688 enabled && (vop->win_enabled & BIT(i))); in rockchip_drm_set_win_enabled()
690 vop_cfg_done(vop); in rockchip_drm_set_win_enabled()
692 spin_unlock(&vop->reg_lock); in rockchip_drm_set_win_enabled()
698 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_disable() local
700 WARN_ON(vop->event); in vop_crtc_atomic_disable()
705 mutex_lock(&vop->vop_lock); in vop_crtc_atomic_disable()
713 * Vop standby will take effect at end of current frame, in vop_crtc_atomic_disable()
719 reinit_completion(&vop->dsp_hold_completion); in vop_crtc_atomic_disable()
720 vop_dsp_hold_valid_irq_enable(vop); in vop_crtc_atomic_disable()
722 spin_lock(&vop->reg_lock); in vop_crtc_atomic_disable()
724 VOP_REG_SET(vop, common, standby, 1); in vop_crtc_atomic_disable()
726 spin_unlock(&vop->reg_lock); in vop_crtc_atomic_disable()
728 wait_for_completion(&vop->dsp_hold_completion); in vop_crtc_atomic_disable()
730 vop_dsp_hold_valid_irq_disable(vop); in vop_crtc_atomic_disable()
732 vop->is_enabled = false; in vop_crtc_atomic_disable()
735 * vop standby complete, so iommu detach is safe. in vop_crtc_atomic_disable()
737 rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev); in vop_crtc_atomic_disable()
739 clk_disable(vop->dclk); in vop_crtc_atomic_disable()
740 vop_core_clks_disable(vop); in vop_crtc_atomic_disable()
741 pm_runtime_put(vop->dev); in vop_crtc_atomic_disable()
744 mutex_unlock(&vop->vop_lock); in vop_crtc_atomic_disable()
829 struct vop *vop = to_vop(crtc); in vop_plane_atomic_check() local
831 if (!vop->data->afbc) { in vop_plane_atomic_check()
832 DRM_ERROR("vop does not support AFBC\n"); in vop_plane_atomic_check()
859 struct vop *vop = to_vop(old_state->crtc); in vop_plane_atomic_disable() local
864 spin_lock(&vop->reg_lock); in vop_plane_atomic_disable()
866 vop_win_disable(vop, vop_win); in vop_plane_atomic_disable()
868 spin_unlock(&vop->reg_lock); in vop_plane_atomic_disable()
879 struct vop *vop = to_vop(state->crtc); in vop_plane_atomic_update() local
898 * can't update plane when vop is disabled. in vop_plane_atomic_update()
903 if (WARN_ON(!vop->is_enabled)) in vop_plane_atomic_update()
938 spin_lock(&vop->reg_lock); in vop_plane_atomic_update()
943 VOP_AFBC_SET(vop, format, afbc_format | AFBC_TILE_16x16); in vop_plane_atomic_update()
944 VOP_AFBC_SET(vop, hreg_block_split, 0); in vop_plane_atomic_update()
945 VOP_AFBC_SET(vop, win_sel, VOP_WIN_TO_INDEX(vop_win)); in vop_plane_atomic_update()
946 VOP_AFBC_SET(vop, hdr_ptr, dma_addr); in vop_plane_atomic_update()
947 VOP_AFBC_SET(vop, pic_size, act_info); in vop_plane_atomic_update()
950 VOP_WIN_SET(vop, win, format, format); in vop_plane_atomic_update()
951 VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4)); in vop_plane_atomic_update()
952 VOP_WIN_SET(vop, win, yrgb_mst, dma_addr); in vop_plane_atomic_update()
953 VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, y2r_en, is_yuv); in vop_plane_atomic_update()
954 VOP_WIN_SET(vop, win, y_mir_en, in vop_plane_atomic_update()
956 VOP_WIN_SET(vop, win, x_mir_en, in vop_plane_atomic_update()
971 VOP_WIN_SET(vop, win, uv_vir, DIV_ROUND_UP(fb->pitches[1], 4)); in vop_plane_atomic_update()
972 VOP_WIN_SET(vop, win, uv_mst, dma_addr); in vop_plane_atomic_update()
975 VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, in vop_plane_atomic_update()
983 scl_vop_cal_scl_fac(vop, win, actual_w, actual_h, in vop_plane_atomic_update()
987 VOP_WIN_SET(vop, win, act_info, act_info); in vop_plane_atomic_update()
988 VOP_WIN_SET(vop, win, dsp_info, dsp_info); in vop_plane_atomic_update()
989 VOP_WIN_SET(vop, win, dsp_st, dsp_st); in vop_plane_atomic_update()
992 VOP_WIN_SET(vop, win, rb_swap, rb_swap); in vop_plane_atomic_update()
1002 VOP_WIN_SET(vop, win, dst_alpha_ctl, in vop_plane_atomic_update()
1009 VOP_WIN_SET(vop, win, src_alpha_ctl, val); in vop_plane_atomic_update()
1011 VOP_WIN_SET(vop, win, alpha_pre_mul, ALPHA_SRC_PRE_MUL); in vop_plane_atomic_update()
1012 VOP_WIN_SET(vop, win, alpha_mode, ALPHA_PER_PIX); in vop_plane_atomic_update()
1013 VOP_WIN_SET(vop, win, alpha_en, 1); in vop_plane_atomic_update()
1015 VOP_WIN_SET(vop, win, src_alpha_ctl, SRC_ALPHA_EN(0)); in vop_plane_atomic_update()
1018 VOP_WIN_SET(vop, win, enable, 1); in vop_plane_atomic_update()
1019 vop->win_enabled |= BIT(win_index); in vop_plane_atomic_update()
1020 spin_unlock(&vop->reg_lock); in vop_plane_atomic_update()
1057 struct vop *vop = to_vop(plane->state->crtc); in vop_plane_atomic_async_update() local
1070 if (vop->is_enabled) { in vop_plane_atomic_async_update()
1072 spin_lock(&vop->reg_lock); in vop_plane_atomic_async_update()
1073 vop_cfg_done(vop); in vop_plane_atomic_async_update()
1074 spin_unlock(&vop->reg_lock); in vop_plane_atomic_async_update()
1087 drm_flip_work_queue(&vop->fb_unref_work, old_fb); in vop_plane_atomic_async_update()
1088 set_bit(VOP_PENDING_FB_UNREF, &vop->pending); in vop_plane_atomic_async_update()
1114 struct vop *vop = to_vop(crtc); in vop_crtc_enable_vblank() local
1117 if (WARN_ON(!vop->is_enabled)) in vop_crtc_enable_vblank()
1120 spin_lock_irqsave(&vop->irq_lock, flags); in vop_crtc_enable_vblank()
1122 VOP_INTR_SET_TYPE(vop, clear, FS_INTR, 1); in vop_crtc_enable_vblank()
1123 VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 1); in vop_crtc_enable_vblank()
1125 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_crtc_enable_vblank()
1132 struct vop *vop = to_vop(crtc); in vop_crtc_disable_vblank() local
1135 if (WARN_ON(!vop->is_enabled)) in vop_crtc_disable_vblank()
1138 spin_lock_irqsave(&vop->irq_lock, flags); in vop_crtc_disable_vblank()
1140 VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 0); in vop_crtc_disable_vblank()
1142 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_crtc_disable_vblank()
1149 struct vop *vop = to_vop(crtc); in vop_crtc_mode_fixup() local
1183 rate = clk_round_rate(vop->dclk, adjusted_mode->clock * 1000 + 999); in vop_crtc_mode_fixup()
1189 static bool vop_dsp_lut_is_enabled(struct vop *vop) in vop_dsp_lut_is_enabled() argument
1191 return vop_read_reg(vop, 0, &vop->data->common->dsp_lut_en); in vop_dsp_lut_is_enabled()
1194 static void vop_crtc_write_gamma_lut(struct vop *vop, struct drm_crtc *crtc) in vop_crtc_write_gamma_lut() argument
1205 writel(word, vop->lut_regs + i * 4); in vop_crtc_write_gamma_lut()
1209 static void vop_crtc_gamma_set(struct vop *vop, struct drm_crtc *crtc, in vop_crtc_gamma_set() argument
1216 if (!vop->lut_regs) in vop_crtc_gamma_set()
1222 spin_lock(&vop->reg_lock); in vop_crtc_gamma_set()
1223 VOP_REG_SET(vop, common, dsp_lut_en, 0); in vop_crtc_gamma_set()
1224 vop_cfg_done(vop); in vop_crtc_gamma_set()
1225 spin_unlock(&vop->reg_lock); in vop_crtc_gamma_set()
1231 ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop, in vop_crtc_gamma_set()
1234 DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n"); in vop_crtc_gamma_set()
1241 spin_lock(&vop->reg_lock); in vop_crtc_gamma_set()
1242 vop_crtc_write_gamma_lut(vop, crtc); in vop_crtc_gamma_set()
1243 VOP_REG_SET(vop, common, dsp_lut_en, 1); in vop_crtc_gamma_set()
1244 vop_cfg_done(vop); in vop_crtc_gamma_set()
1245 spin_unlock(&vop->reg_lock); in vop_crtc_gamma_set()
1251 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_begin() local
1259 vop_crtc_gamma_set(vop, crtc, old_crtc_state); in vop_crtc_atomic_begin()
1265 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_enable() local
1266 const struct vop_data *vop_data = vop->data; in vop_crtc_atomic_enable()
1295 vop_crtc_gamma_set(vop, crtc, old_state); in vop_crtc_atomic_enable()
1297 mutex_lock(&vop->vop_lock); in vop_crtc_atomic_enable()
1299 WARN_ON(vop->event); in vop_crtc_atomic_enable()
1303 mutex_unlock(&vop->vop_lock); in vop_crtc_atomic_enable()
1304 DRM_DEV_ERROR(vop->dev, "Failed to enable vop (%d)\n", ret); in vop_crtc_atomic_enable()
1311 VOP_REG_SET(vop, output, pin_pol, pin_pol); in vop_crtc_atomic_enable()
1312 VOP_REG_SET(vop, output, mipi_dual_channel_en, 0); in vop_crtc_atomic_enable()
1316 VOP_REG_SET(vop, output, rgb_dclk_pol, 1); in vop_crtc_atomic_enable()
1317 VOP_REG_SET(vop, output, rgb_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1318 VOP_REG_SET(vop, output, rgb_en, 1); in vop_crtc_atomic_enable()
1321 VOP_REG_SET(vop, output, edp_dclk_pol, 1); in vop_crtc_atomic_enable()
1322 VOP_REG_SET(vop, output, edp_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1323 VOP_REG_SET(vop, output, edp_en, 1); in vop_crtc_atomic_enable()
1326 VOP_REG_SET(vop, output, hdmi_dclk_pol, 1); in vop_crtc_atomic_enable()
1327 VOP_REG_SET(vop, output, hdmi_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1328 VOP_REG_SET(vop, output, hdmi_en, 1); in vop_crtc_atomic_enable()
1331 VOP_REG_SET(vop, output, mipi_dclk_pol, 1); in vop_crtc_atomic_enable()
1332 VOP_REG_SET(vop, output, mipi_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1333 VOP_REG_SET(vop, output, mipi_en, 1); in vop_crtc_atomic_enable()
1334 VOP_REG_SET(vop, output, mipi_dual_channel_en, in vop_crtc_atomic_enable()
1338 VOP_REG_SET(vop, output, dp_dclk_pol, 0); in vop_crtc_atomic_enable()
1339 VOP_REG_SET(vop, output, dp_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1340 VOP_REG_SET(vop, output, dp_en, 1); in vop_crtc_atomic_enable()
1343 DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n", in vop_crtc_atomic_enable()
1348 * if vop is not support RGB10 output, need force RGB10 to RGB888. in vop_crtc_atomic_enable()
1355 VOP_REG_SET(vop, common, pre_dither_down, 1); in vop_crtc_atomic_enable()
1357 VOP_REG_SET(vop, common, pre_dither_down, 0); in vop_crtc_atomic_enable()
1360 VOP_REG_SET(vop, common, dither_down_sel, DITHER_DOWN_ALLEGRO); in vop_crtc_atomic_enable()
1361 VOP_REG_SET(vop, common, dither_down_mode, RGB888_TO_RGB666); in vop_crtc_atomic_enable()
1362 VOP_REG_SET(vop, common, dither_down_en, 1); in vop_crtc_atomic_enable()
1364 VOP_REG_SET(vop, common, dither_down_en, 0); in vop_crtc_atomic_enable()
1367 VOP_REG_SET(vop, common, out_mode, s->output_mode); in vop_crtc_atomic_enable()
1369 VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len); in vop_crtc_atomic_enable()
1372 VOP_REG_SET(vop, modeset, hact_st_end, val); in vop_crtc_atomic_enable()
1373 VOP_REG_SET(vop, modeset, hpost_st_end, val); in vop_crtc_atomic_enable()
1375 VOP_REG_SET(vop, modeset, vtotal_pw, (vtotal << 16) | vsync_len); in vop_crtc_atomic_enable()
1378 VOP_REG_SET(vop, modeset, vact_st_end, val); in vop_crtc_atomic_enable()
1379 VOP_REG_SET(vop, modeset, vpost_st_end, val); in vop_crtc_atomic_enable()
1381 VOP_REG_SET(vop, intr, line_flag_num[0], vact_end); in vop_crtc_atomic_enable()
1383 clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); in vop_crtc_atomic_enable()
1385 VOP_REG_SET(vop, common, standby, 0); in vop_crtc_atomic_enable()
1386 mutex_unlock(&vop->vop_lock); in vop_crtc_atomic_enable()
1389 static bool vop_fs_irq_is_pending(struct vop *vop) in vop_fs_irq_is_pending() argument
1391 return VOP_INTR_GET_TYPE(vop, status, FS_INTR); in vop_fs_irq_is_pending()
1394 static void vop_wait_for_irq_handler(struct vop *vop) in vop_wait_for_irq_handler() argument
1407 ret = readx_poll_timeout_atomic(vop_fs_irq_is_pending, vop, pending, in vop_wait_for_irq_handler()
1410 DRM_DEV_ERROR(vop->dev, "VOP vblank IRQ stuck for 10 ms\n"); in vop_wait_for_irq_handler()
1412 synchronize_irq(vop->irq); in vop_wait_for_irq_handler()
1418 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_check() local
1424 if (vop->lut_regs && crtc_state->color_mgmt_changed && in vop_crtc_atomic_check()
1465 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_flush() local
1470 if (WARN_ON(!vop->is_enabled)) in vop_crtc_atomic_flush()
1473 spin_lock(&vop->reg_lock); in vop_crtc_atomic_flush()
1477 VOP_AFBC_SET(vop, enable, s->enable_afbc); in vop_crtc_atomic_flush()
1478 vop_cfg_done(vop); in vop_crtc_atomic_flush()
1480 spin_unlock(&vop->reg_lock); in vop_crtc_atomic_flush()
1487 vop_wait_for_irq_handler(vop); in vop_crtc_atomic_flush()
1492 WARN_ON(vop->event); in vop_crtc_atomic_flush()
1494 vop->event = crtc->state->event; in vop_crtc_atomic_flush()
1509 drm_flip_work_queue(&vop->fb_unref_work, old_plane_state->fb); in vop_crtc_atomic_flush()
1510 set_bit(VOP_PENDING_FB_UNREF, &vop->pending); in vop_crtc_atomic_flush()
1561 static struct drm_connector *vop_get_edp_connector(struct vop *vop) in vop_get_edp_connector() argument
1566 drm_connector_list_iter_begin(vop->drm_dev, &conn_iter); in vop_get_edp_connector()
1581 struct vop *vop = to_vop(crtc); in vop_crtc_set_crc_source() local
1585 connector = vop_get_edp_connector(vop); in vop_crtc_set_crc_source()
1641 struct vop *vop = container_of(work, struct vop, fb_unref_work); in vop_fb_unref_worker() local
1644 drm_crtc_vblank_put(&vop->crtc); in vop_fb_unref_worker()
1648 static void vop_handle_vblank(struct vop *vop) in vop_handle_vblank() argument
1650 struct drm_device *drm = vop->drm_dev; in vop_handle_vblank()
1651 struct drm_crtc *crtc = &vop->crtc; in vop_handle_vblank()
1654 if (vop->event) { in vop_handle_vblank()
1655 drm_crtc_send_vblank_event(crtc, vop->event); in vop_handle_vblank()
1657 vop->event = NULL; in vop_handle_vblank()
1661 if (test_and_clear_bit(VOP_PENDING_FB_UNREF, &vop->pending)) in vop_handle_vblank()
1662 drm_flip_work_commit(&vop->fb_unref_work, system_unbound_wq); in vop_handle_vblank()
1667 struct vop *vop = data; in vop_isr() local
1668 struct drm_crtc *crtc = &vop->crtc; in vop_isr()
1674 * vop-device is disabled the irq has to be targeted at the iommu. in vop_isr()
1676 if (!pm_runtime_get_if_in_use(vop->dev)) in vop_isr()
1679 if (vop_core_clks_enable(vop)) { in vop_isr()
1680 DRM_DEV_ERROR_RATELIMITED(vop->dev, "couldn't enable clocks\n"); in vop_isr()
1688 spin_lock(&vop->irq_lock); in vop_isr()
1690 active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); in vop_isr()
1693 VOP_INTR_SET_TYPE(vop, clear, active_irqs, 1); in vop_isr()
1695 spin_unlock(&vop->irq_lock); in vop_isr()
1697 /* This is expected for vop iommu irqs, since the irq is shared */ in vop_isr()
1702 complete(&vop->dsp_hold_completion); in vop_isr()
1708 complete(&vop->line_flag_completion); in vop_isr()
1715 vop_handle_vblank(vop); in vop_isr()
1722 DRM_DEV_ERROR(vop->dev, "Unknown VOP IRQs: %#02x\n", in vop_isr()
1726 vop_core_clks_disable(vop); in vop_isr()
1728 pm_runtime_put(vop->dev); in vop_isr()
1744 static int vop_create_crtc(struct vop *vop) in vop_create_crtc() argument
1746 const struct vop_data *vop_data = vop->data; in vop_create_crtc()
1747 struct device *dev = vop->dev; in vop_create_crtc()
1748 struct drm_device *drm_dev = vop->drm_dev; in vop_create_crtc()
1750 struct drm_crtc *crtc = &vop->crtc; in vop_create_crtc()
1761 struct vop_win *vop_win = &vop->win[i]; in vop_create_crtc()
1768 ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, in vop_create_crtc()
1775 DRM_DEV_ERROR(vop->dev, "failed to init plane %d\n", in vop_create_crtc()
1795 if (vop->lut_regs) { in vop_create_crtc()
1805 struct vop_win *vop_win = &vop->win[i]; in vop_create_crtc()
1812 ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, in vop_create_crtc()
1820 DRM_DEV_ERROR(vop->dev, "failed to init overlay %d\n", in vop_create_crtc()
1830 DRM_DEV_ERROR(vop->dev, "no port node found in %pOF\n", in vop_create_crtc()
1836 drm_flip_work_init(&vop->fb_unref_work, "fb_unref", in vop_create_crtc()
1839 init_completion(&vop->dsp_hold_completion); in vop_create_crtc()
1840 init_completion(&vop->line_flag_completion); in vop_create_crtc()
1845 DRM_DEV_DEBUG_KMS(vop->dev, in vop_create_crtc()
1860 static void vop_destroy_crtc(struct vop *vop) in vop_destroy_crtc() argument
1862 struct drm_crtc *crtc = &vop->crtc; in vop_destroy_crtc()
1863 struct drm_device *drm_dev = vop->drm_dev; in vop_destroy_crtc()
1873 * The planes are "&vop->win[i].base". That means the memory is in vop_destroy_crtc()
1874 * all part of the big "struct vop" chunk of memory. That memory in vop_destroy_crtc()
1887 drm_flip_work_cleanup(&vop->fb_unref_work); in vop_destroy_crtc()
1890 static int vop_initial(struct vop *vop) in vop_initial() argument
1895 vop->hclk = devm_clk_get(vop->dev, "hclk_vop"); in vop_initial()
1896 if (IS_ERR(vop->hclk)) { in vop_initial()
1897 DRM_DEV_ERROR(vop->dev, "failed to get hclk source\n"); in vop_initial()
1898 return PTR_ERR(vop->hclk); in vop_initial()
1900 vop->aclk = devm_clk_get(vop->dev, "aclk_vop"); in vop_initial()
1901 if (IS_ERR(vop->aclk)) { in vop_initial()
1902 DRM_DEV_ERROR(vop->dev, "failed to get aclk source\n"); in vop_initial()
1903 return PTR_ERR(vop->aclk); in vop_initial()
1905 vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); in vop_initial()
1906 if (IS_ERR(vop->dclk)) { in vop_initial()
1907 DRM_DEV_ERROR(vop->dev, "failed to get dclk source\n"); in vop_initial()
1908 return PTR_ERR(vop->dclk); in vop_initial()
1911 ret = pm_runtime_get_sync(vop->dev); in vop_initial()
1913 DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret); in vop_initial()
1917 ret = clk_prepare(vop->dclk); in vop_initial()
1919 DRM_DEV_ERROR(vop->dev, "failed to prepare dclk\n"); in vop_initial()
1923 /* Enable both the hclk and aclk to setup the vop */ in vop_initial()
1924 ret = clk_prepare_enable(vop->hclk); in vop_initial()
1926 DRM_DEV_ERROR(vop->dev, "failed to prepare/enable hclk\n"); in vop_initial()
1930 ret = clk_prepare_enable(vop->aclk); in vop_initial()
1932 DRM_DEV_ERROR(vop->dev, "failed to prepare/enable aclk\n"); in vop_initial()
1937 * do hclk_reset, reset all vop registers. in vop_initial()
1939 ahb_rst = devm_reset_control_get(vop->dev, "ahb"); in vop_initial()
1941 DRM_DEV_ERROR(vop->dev, "failed to get ahb reset\n"); in vop_initial()
1949 VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1); in vop_initial()
1950 VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0); in vop_initial()
1952 for (i = 0; i < vop->len; i += sizeof(u32)) in vop_initial()
1953 vop->regsbak[i / 4] = readl_relaxed(vop->regs + i); in vop_initial()
1955 VOP_REG_SET(vop, misc, global_regdone_en, 1); in vop_initial()
1956 VOP_REG_SET(vop, common, dsp_blank, 0); in vop_initial()
1958 for (i = 0; i < vop->data->win_size; i++) { in vop_initial()
1959 struct vop_win *vop_win = &vop->win[i]; in vop_initial()
1963 VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel); in vop_initial()
1964 vop_win_disable(vop, vop_win); in vop_initial()
1965 VOP_WIN_SET(vop, win, gate, 1); in vop_initial()
1968 vop_cfg_done(vop); in vop_initial()
1973 vop->dclk_rst = devm_reset_control_get(vop->dev, "dclk"); in vop_initial()
1974 if (IS_ERR(vop->dclk_rst)) { in vop_initial()
1975 DRM_DEV_ERROR(vop->dev, "failed to get dclk reset\n"); in vop_initial()
1976 ret = PTR_ERR(vop->dclk_rst); in vop_initial()
1979 reset_control_assert(vop->dclk_rst); in vop_initial()
1981 reset_control_deassert(vop->dclk_rst); in vop_initial()
1983 clk_disable(vop->hclk); in vop_initial()
1984 clk_disable(vop->aclk); in vop_initial()
1986 vop->is_enabled = false; in vop_initial()
1988 pm_runtime_put_sync(vop->dev); in vop_initial()
1993 clk_disable_unprepare(vop->aclk); in vop_initial()
1995 clk_disable_unprepare(vop->hclk); in vop_initial()
1997 clk_unprepare(vop->dclk); in vop_initial()
1999 pm_runtime_put_sync(vop->dev); in vop_initial()
2004 * Initialize the vop->win array elements.
2006 static void vop_win_init(struct vop *vop) in vop_win_init() argument
2008 const struct vop_data *vop_data = vop->data; in vop_win_init()
2012 struct vop_win *vop_win = &vop->win[i]; in vop_win_init()
2016 vop_win->vop = vop; in vop_win_init()
2035 struct vop *vop = to_vop(crtc); in rockchip_drm_wait_vact_end() local
2039 if (!crtc || !vop->is_enabled) in rockchip_drm_wait_vact_end()
2042 mutex_lock(&vop->vop_lock); in rockchip_drm_wait_vact_end()
2048 if (vop_line_flag_irq_is_enabled(vop)) { in rockchip_drm_wait_vact_end()
2053 reinit_completion(&vop->line_flag_completion); in rockchip_drm_wait_vact_end()
2054 vop_line_flag_irq_enable(vop); in rockchip_drm_wait_vact_end()
2056 jiffies_left = wait_for_completion_timeout(&vop->line_flag_completion, in rockchip_drm_wait_vact_end()
2058 vop_line_flag_irq_disable(vop); in rockchip_drm_wait_vact_end()
2061 DRM_DEV_ERROR(vop->dev, "Timeout waiting for IRQ\n"); in rockchip_drm_wait_vact_end()
2067 mutex_unlock(&vop->vop_lock); in rockchip_drm_wait_vact_end()
2077 struct vop *vop; in vop_bind() local
2085 /* Allocate vop struct and its vop_win array */ in vop_bind()
2086 vop = devm_kzalloc(dev, struct_size(vop, win, vop_data->win_size), in vop_bind()
2088 if (!vop) in vop_bind()
2091 vop->dev = dev; in vop_bind()
2092 vop->data = vop_data; in vop_bind()
2093 vop->drm_dev = drm_dev; in vop_bind()
2094 dev_set_drvdata(dev, vop); in vop_bind()
2096 vop_win_init(vop); in vop_bind()
2099 vop->len = resource_size(res); in vop_bind()
2100 vop->regs = devm_ioremap_resource(dev, res); in vop_bind()
2101 if (IS_ERR(vop->regs)) in vop_bind()
2102 return PTR_ERR(vop->regs); in vop_bind()
2110 vop->lut_regs = devm_ioremap_resource(dev, res); in vop_bind()
2111 if (IS_ERR(vop->lut_regs)) in vop_bind()
2112 return PTR_ERR(vop->lut_regs); in vop_bind()
2115 vop->regsbak = devm_kzalloc(dev, vop->len, GFP_KERNEL); in vop_bind()
2116 if (!vop->regsbak) in vop_bind()
2121 DRM_DEV_ERROR(dev, "cannot find irq for vop\n"); in vop_bind()
2124 vop->irq = (unsigned int)irq; in vop_bind()
2126 spin_lock_init(&vop->reg_lock); in vop_bind()
2127 spin_lock_init(&vop->irq_lock); in vop_bind()
2128 mutex_init(&vop->vop_lock); in vop_bind()
2130 ret = vop_create_crtc(vop); in vop_bind()
2136 ret = vop_initial(vop); in vop_bind()
2139 "cannot initial vop dev - err %d\n", ret); in vop_bind()
2143 ret = devm_request_irq(dev, vop->irq, vop_isr, in vop_bind()
2144 IRQF_SHARED, dev_name(dev), vop); in vop_bind()
2148 if (vop->data->feature & VOP_FEATURE_INTERNAL_RGB) { in vop_bind()
2149 vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev); in vop_bind()
2150 if (IS_ERR(vop->rgb)) { in vop_bind()
2151 ret = PTR_ERR(vop->rgb); in vop_bind()
2160 vop_destroy_crtc(vop); in vop_bind()
2166 struct vop *vop = dev_get_drvdata(dev); in vop_unbind() local
2168 if (vop->rgb) in vop_unbind()
2169 rockchip_rgb_fini(vop->rgb); in vop_unbind()
2172 vop_destroy_crtc(vop); in vop_unbind()
2174 clk_unprepare(vop->aclk); in vop_unbind()
2175 clk_unprepare(vop->hclk); in vop_unbind()
2176 clk_unprepare(vop->dclk); in vop_unbind()