Lines Matching full:pi
56 struct rv7xx_power_info *pi = rdev->pm.dpm.priv; in rv770_get_pi() local
58 return pi; in rv770_get_pi()
63 struct evergreen_power_info *pi = rdev->pm.dpm.priv; in evergreen_get_pi() local
65 return pi; in evergreen_get_pi()
71 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_enable_bif_dynamic_pcie_gen2() local
80 if (!pi->boot_in_gen2) { in rv770_enable_bif_dynamic_pcie_gen2()
145 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_mg_clock_gating_enable() local
158 if (pi->mgcgtssm) in rv770_mg_clock_gating_enable()
237 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
240 pi->soft_regs_start + reg_offset,
241 value, pi->sram_end);
248 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_write_smc_soft_register() local
251 pi->soft_regs_start + reg_offset, in rv770_write_smc_soft_register()
252 value, pi->sram_end); in rv770_write_smc_soft_register()
260 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_t() local
271 a_n = (int)state->medium.sclk * pi->lmp + in rv770_populate_smc_t()
272 (int)state->low.sclk * (R600_AH_DFLT - pi->rlp); in rv770_populate_smc_t()
273 a_d = (int)state->low.sclk * (100 - (int)pi->rlp) + in rv770_populate_smc_t()
274 (int)state->medium.sclk * pi->lmp; in rv770_populate_smc_t()
276 l[1] = (u8)(pi->lmp - (int)pi->lmp * a_n / a_d); in rv770_populate_smc_t()
277 r[0] = (u8)(pi->rlp + (100 - (int)pi->rlp) * a_n / a_d); in rv770_populate_smc_t()
279 a_n = (int)state->high.sclk * pi->lhp + (int)state->medium.sclk * in rv770_populate_smc_t()
280 (R600_AH_DFLT - pi->rmp); in rv770_populate_smc_t()
281 a_d = (int)state->medium.sclk * (100 - (int)pi->rmp) + in rv770_populate_smc_t()
282 (int)state->high.sclk * pi->lhp; in rv770_populate_smc_t()
284 l[2] = (u8)(pi->lhp - (int)pi->lhp * a_n / a_d); in rv770_populate_smc_t()
285 r[1] = (u8)(pi->rmp + (100 - (int)pi->rmp) * a_n / a_d); in rv770_populate_smc_t()
288 a_t = CG_R(r[i] * pi->bsp / 200) | CG_L(l[i] * pi->bsp / 200); in rv770_populate_smc_t()
292 a_t = CG_R(r[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1] * pi->pbsp / 200) | in rv770_populate_smc_t()
293 CG_L(l[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1] * pi->pbsp / 200); in rv770_populate_smc_t()
305 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_sp() local
309 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
312 cpu_to_be32(pi->psp); in rv770_populate_smc_sp()
389 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_mclk_value() local
392 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_mclk_value()
394 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv770_populate_mclk_value()
396 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_mclk_value()
398 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_mclk_value()
400 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv770_populate_mclk_value()
401 u32 dll_cntl = pi->clk_regs.rv770.dll_cntl; in rv770_populate_mclk_value()
418 pi->mem_gddr5, in rv770_populate_mclk_value()
443 if (pi->mem_gddr5) { in rv770_populate_mclk_value()
446 pi->mem_gddr5, in rv770_populate_mclk_value()
487 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_sclk_value() local
490 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_sclk_value()
492 pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv770_populate_sclk_value()
494 pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv770_populate_sclk_value()
496 pi->clk_regs.rv770.cg_spll_spread_spectrum; in rv770_populate_sclk_value()
498 pi->clk_regs.rv770.cg_spll_spread_spectrum_2; in rv770_populate_sclk_value()
537 if (pi->sclk_ss) { in rv770_populate_sclk_value()
568 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_vddc_value() local
571 if (!pi->voltage_control) { in rv770_populate_vddc_value()
577 for (i = 0; i < pi->valid_vddc_entries; i++) { in rv770_populate_vddc_value()
578 if (vddc <= pi->vddc_table[i].vddc) { in rv770_populate_vddc_value()
579 voltage->index = pi->vddc_table[i].vddc_index; in rv770_populate_vddc_value()
585 if (i == pi->valid_vddc_entries) in rv770_populate_vddc_value()
594 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_mvdd_value() local
596 if (!pi->mvdd_control) { in rv770_populate_mvdd_value()
602 if (mclk <= pi->mvdd_split_frequency) { in rv770_populate_mvdd_value()
618 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_convert_power_level_to_smc() local
621 level->gen2PCIE = pi->pcie_gen2 ? in rv770_convert_power_level_to_smc()
640 if (pi->mem_gddr5) { in rv770_convert_power_level_to_smc()
641 if (pl->mclk <= pi->mclk_strobe_mode_threshold) in rv770_convert_power_level_to_smc()
647 if (pl->mclk > pi->mclk_edc_enable_threshold) in rv770_convert_power_level_to_smc()
742 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_memory_timing_parameters() local
756 STATE0(64 * high_clock / pi->boot_sclk) | in rv770_program_memory_timing_parameters()
763 POWERMODE0(rv770_calculate_memory_refresh_rate(rdev, pi->boot_sclk)) | in rv770_program_memory_timing_parameters()
782 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_enable_spread_spectrum() local
785 if (pi->sclk_ss) in rv770_enable_spread_spectrum()
788 if (pi->mclk_ss) { in rv770_enable_spread_spectrum()
806 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_mpll_timing_parameters() local
808 if ((rdev->family == CHIP_RV770) && !pi->mem_gddr5) { in rv770_program_mpll_timing_parameters()
810 (MPLL_LOCK_TIME(R600_MPLLLOCKTIME_DFLT * pi->ref_div) | in rv770_program_mpll_timing_parameters()
817 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_setup_bsp() local
820 r600_calculate_u_and_p(pi->asi, in rv770_setup_bsp()
823 &pi->bsp, in rv770_setup_bsp()
824 &pi->bsu); in rv770_setup_bsp()
826 r600_calculate_u_and_p(pi->pasi, in rv770_setup_bsp()
829 &pi->pbsp, in rv770_setup_bsp()
830 &pi->pbsu); in rv770_setup_bsp()
832 pi->dsp = BSP(pi->bsp) | BSU(pi->bsu); in rv770_setup_bsp()
833 pi->psp = BSP(pi->pbsp) | BSU(pi->pbsu); in rv770_setup_bsp()
835 WREG32(CG_BSP, pi->dsp); in rv770_setup_bsp()
889 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_vc() local
891 WREG32(CG_FTV, pi->vrc); in rv770_program_vc()
901 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_upload_firmware() local
907 ret = rv770_load_smc_ucode(rdev, pi->sram_end); in rv770_upload_firmware()
917 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_acpi_state() local
920 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_smc_acpi_state()
922 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv770_populate_smc_acpi_state()
924 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_smc_acpi_state()
926 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_smc_acpi_state()
928 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_smc_acpi_state()
930 pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv770_populate_smc_acpi_state()
932 pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv770_populate_smc_acpi_state()
940 if (pi->acpi_vddc) { in rv770_populate_smc_acpi_state()
941 rv770_populate_vddc_value(rdev, pi->acpi_vddc, in rv770_populate_smc_acpi_state()
943 if (pi->pcie_gen2) { in rv770_populate_smc_acpi_state()
944 if (pi->acpi_pcie_gen2) in rv770_populate_smc_acpi_state()
950 if (pi->acpi_pcie_gen2) in rv770_populate_smc_acpi_state()
955 rv770_populate_vddc_value(rdev, pi->min_vddc_in_table, in rv770_populate_smc_acpi_state()
1008 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_initial_mvdd_value() local
1010 if ((pi->s0_vid_lower_smio_cntl & pi->mvdd_mask_low) == in rv770_populate_initial_mvdd_value()
1011 (pi->mvdd_low_smio[MVDD_LOW_INDEX] & pi->mvdd_mask_low) ) { in rv770_populate_initial_mvdd_value()
1027 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_initial_state() local
1031 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl); in rv770_populate_smc_initial_state()
1033 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl_2); in rv770_populate_smc_initial_state()
1035 cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl); in rv770_populate_smc_initial_state()
1037 cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2); in rv770_populate_smc_initial_state()
1039 cpu_to_be32(pi->clk_regs.rv770.mclk_pwrmgt_cntl); in rv770_populate_smc_initial_state()
1041 cpu_to_be32(pi->clk_regs.rv770.dll_cntl); in rv770_populate_smc_initial_state()
1044 cpu_to_be32(pi->clk_regs.rv770.mpll_ss1); in rv770_populate_smc_initial_state()
1046 cpu_to_be32(pi->clk_regs.rv770.mpll_ss2); in rv770_populate_smc_initial_state()
1052 cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl); in rv770_populate_smc_initial_state()
1054 cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_2); in rv770_populate_smc_initial_state()
1056 cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_3); in rv770_populate_smc_initial_state()
1058 cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum); in rv770_populate_smc_initial_state()
1060 cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2); in rv770_populate_smc_initial_state()
1079 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_initial_state()
1081 if (pi->boot_in_gen2) in rv770_populate_smc_initial_state()
1091 if (pi->mem_gddr5) { in rv770_populate_smc_initial_state()
1092 if (initial_state->low.mclk <= pi->mclk_strobe_mode_threshold) in rv770_populate_smc_initial_state()
1098 if (initial_state->low.mclk >= pi->mclk_edc_enable_threshold) in rv770_populate_smc_initial_state()
1116 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_vddc_table() local
1119 for (i = 0; i < pi->valid_vddc_entries; i++) { in rv770_populate_smc_vddc_table()
1120 table->highSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1121 pi->vddc_table[i].high_smio; in rv770_populate_smc_vddc_table()
1122 table->lowSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1123 cpu_to_be32(pi->vddc_table[i].low_smio); in rv770_populate_smc_vddc_table()
1128 cpu_to_be32(pi->vddc_mask_low); in rv770_populate_smc_vddc_table()
1131 ((i < pi->valid_vddc_entries) && in rv770_populate_smc_vddc_table()
1132 (pi->max_vddc_in_table > in rv770_populate_smc_vddc_table()
1133 pi->vddc_table[i].vddc)); in rv770_populate_smc_vddc_table()
1137 pi->vddc_table[i].vddc_index; in rv770_populate_smc_vddc_table()
1145 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_mvdd_table() local
1147 if (pi->mvdd_control) { in rv770_populate_smc_mvdd_table()
1149 cpu_to_be32(pi->mvdd_low_smio[MVDD_HIGH_INDEX]); in rv770_populate_smc_mvdd_table()
1151 cpu_to_be32(pi->mvdd_low_smio[MVDD_LOW_INDEX]); in rv770_populate_smc_mvdd_table()
1155 cpu_to_be32(pi->mvdd_mask_low); in rv770_populate_smc_mvdd_table()
1164 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_init_smc_table() local
1166 RV770_SMC_STATETABLE *table = &pi->smc_statetable; in rv770_init_smc_table()
1171 pi->boot_sclk = boot_state->low.sclk; in rv770_init_smc_table()
1203 if (pi->mem_gddr5) in rv770_init_smc_table()
1225 pi->state_table_start, in rv770_init_smc_table()
1228 pi->sram_end); in rv770_init_smc_table()
1233 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_construct_vddc_table() local
1251 pi->vddc_table[i].vddc = (u16)(min + i * step); in rv770_construct_vddc_table()
1253 pi->vddc_table[i].vddc, in rv770_construct_vddc_table()
1256 pi->vddc_table[i].low_smio = gpio_pins & gpio_mask; in rv770_construct_vddc_table()
1257 pi->vddc_table[i].high_smio = 0; in rv770_construct_vddc_table()
1258 pi->vddc_mask_low = gpio_mask; in rv770_construct_vddc_table()
1260 if ((pi->vddc_table[i].low_smio != in rv770_construct_vddc_table()
1261 pi->vddc_table[i - 1].low_smio ) || in rv770_construct_vddc_table()
1262 (pi->vddc_table[i].high_smio != in rv770_construct_vddc_table()
1263 pi->vddc_table[i - 1].high_smio)) in rv770_construct_vddc_table()
1266 pi->vddc_table[i].vddc_index = vddc_index; in rv770_construct_vddc_table()
1269 pi->valid_vddc_entries = (u8)steps; in rv770_construct_vddc_table()
1284 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_mvdd_pin_configuration() local
1290 pi->mvdd_mask_low = gpio_mask; in rv770_get_mvdd_pin_configuration()
1291 pi->mvdd_low_smio[MVDD_HIGH_INDEX] = in rv770_get_mvdd_pin_configuration()
1297 pi->mvdd_low_smio[MVDD_LOW_INDEX] = in rv770_get_mvdd_pin_configuration()
1310 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_mvdd_configuration() local
1317 pi->mvdd_control = false; in rv770_get_mvdd_configuration()
1321 pi->mvdd_split_frequency = in rv770_get_mvdd_configuration()
1324 if (pi->mvdd_split_frequency == 0) { in rv770_get_mvdd_configuration()
1325 pi->mvdd_control = false; in rv770_get_mvdd_configuration()
1384 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_upload_sw_state() local
1385 u16 address = pi->state_table_start + in rv770_upload_sw_state()
1396 pi->sram_end); in rv770_upload_sw_state()
1518 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_read_clock_registers() local
1520 pi->clk_regs.rv770.cg_spll_func_cntl = in rv770_read_clock_registers()
1522 pi->clk_regs.rv770.cg_spll_func_cntl_2 = in rv770_read_clock_registers()
1524 pi->clk_regs.rv770.cg_spll_func_cntl_3 = in rv770_read_clock_registers()
1526 pi->clk_regs.rv770.cg_spll_spread_spectrum = in rv770_read_clock_registers()
1528 pi->clk_regs.rv770.cg_spll_spread_spectrum_2 = in rv770_read_clock_registers()
1530 pi->clk_regs.rv770.mpll_ad_func_cntl = in rv770_read_clock_registers()
1532 pi->clk_regs.rv770.mpll_ad_func_cntl_2 = in rv770_read_clock_registers()
1534 pi->clk_regs.rv770.mpll_dq_func_cntl = in rv770_read_clock_registers()
1536 pi->clk_regs.rv770.mpll_dq_func_cntl_2 = in rv770_read_clock_registers()
1538 pi->clk_regs.rv770.mclk_pwrmgt_cntl = in rv770_read_clock_registers()
1540 pi->clk_regs.rv770.dll_cntl = RREG32(DLL_CNTL); in rv770_read_clock_registers()
1555 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_read_voltage_smio_registers() local
1557 pi->s0_vid_lower_smio_cntl = in rv770_read_voltage_smio_registers()
1563 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_reset_smio_status() local
1581 vid_smio_cntl = pi->s0_vid_lower_smio_cntl; in rv770_reset_smio_status()
1591 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_memory_type() local
1598 pi->mem_gddr5 = true; in rv770_get_memory_type()
1600 pi->mem_gddr5 = false; in rv770_get_memory_type()
1606 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_pcie_gen2_status() local
1613 pi->pcie_gen2 = true; in rv770_get_pcie_gen2_status()
1615 pi->pcie_gen2 = false; in rv770_get_pcie_gen2_status()
1617 if (pi->pcie_gen2) { in rv770_get_pcie_gen2_status()
1619 pi->boot_in_gen2 = true; in rv770_get_pcie_gen2_status()
1621 pi->boot_in_gen2 = false; in rv770_get_pcie_gen2_status()
1623 pi->boot_in_gen2 = false; in rv770_get_pcie_gen2_status()
1629 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
1631 if (pi->gfx_clock_gating) {
1648 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
1662 if (pi->gfx_clock_gating)
1671 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_mclk_odt_threshold() local
1675 pi->mclk_odt_threshold = 0; in rv770_get_mclk_odt_threshold()
1685 pi->mclk_odt_threshold = 30000; in rv770_get_mclk_odt_threshold()
1691 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_max_vddc() local
1695 pi->max_vddc = 0; in rv770_get_max_vddc()
1697 pi->max_vddc = vddc; in rv770_get_max_vddc()
1747 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_dcodt_before_state_switch() local
1753 if (pi->mclk_odt_threshold == 0) in rv770_program_dcodt_before_state_switch()
1756 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_before_state_switch()
1759 if (new_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_before_state_switch()
1776 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_dcodt_after_state_switch() local
1782 if (pi->mclk_odt_threshold == 0) in rv770_program_dcodt_after_state_switch()
1785 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_after_state_switch()
1788 if (new_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_after_state_switch()
1803 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_retrieve_odt_values() local
1805 if (pi->mclk_odt_threshold == 0) in rv770_retrieve_odt_values()
1814 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_set_dpm_event_sources() local
1842 if (pi->thermal_protection) in rv770_set_dpm_event_sources()
1853 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_enable_auto_throttle_source() local
1856 if (!(pi->active_auto_throttle_sources & (1 << source))) { in rv770_enable_auto_throttle_source()
1857 pi->active_auto_throttle_sources |= 1 << source; in rv770_enable_auto_throttle_source()
1858 rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv770_enable_auto_throttle_source()
1861 if (pi->active_auto_throttle_sources & (1 << source)) { in rv770_enable_auto_throttle_source()
1862 pi->active_auto_throttle_sources &= ~(1 << source); in rv770_enable_auto_throttle_source()
1863 rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv770_enable_auto_throttle_source()
1895 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_enable() local
1899 if (pi->gfx_clock_gating) in rv770_dpm_enable()
1905 if (pi->voltage_control) { in rv770_dpm_enable()
1914 if (pi->dcodt) in rv770_dpm_enable()
1917 if (pi->mvdd_control) { in rv770_dpm_enable()
1930 if (pi->thermal_protection) in rv770_dpm_enable()
1943 if (pi->dynamic_pcie_gen2) in rv770_dpm_enable()
1965 if (pi->gfx_clock_gating) in rv770_dpm_enable()
1968 if (pi->mg_clock_gating) in rv770_dpm_enable()
2000 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_disable() local
2007 if (pi->thermal_protection) in rv770_dpm_disable()
2012 if (pi->dynamic_pcie_gen2) in rv770_dpm_disable()
2021 if (pi->gfx_clock_gating) in rv770_dpm_disable()
2024 if (pi->mg_clock_gating) in rv770_dpm_disable()
2038 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_set_power_state() local
2060 if (pi->dcodt) in rv770_dpm_set_power_state()
2072 if (pi->dcodt) in rv770_dpm_set_power_state()
2082 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
2086 if (pi->dcodt)
2089 if (pi->dcodt)
2096 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_setup_asic() local
2101 if (pi->dcodt) in rv770_dpm_setup_asic()
2177 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv7xx_parse_pplib_clock_info() local
2220 if (pi->max_vddc) in rv7xx_parse_pplib_clock_info()
2221 pl->vddc = pi->max_vddc; in rv7xx_parse_pplib_clock_info()
2225 pi->acpi_vddc = pl->vddc; in rv7xx_parse_pplib_clock_info()
2229 pi->acpi_pcie_gen2 = true; in rv7xx_parse_pplib_clock_info()
2231 pi->acpi_pcie_gen2 = false; in rv7xx_parse_pplib_clock_info()
2241 if (pi->min_vddc_in_table > pl->vddc) in rv7xx_parse_pplib_clock_info()
2242 pi->min_vddc_in_table = pl->vddc; in rv7xx_parse_pplib_clock_info()
2244 if (pi->max_vddc_in_table < pl->vddc) in rv7xx_parse_pplib_clock_info()
2245 pi->max_vddc_in_table = pl->vddc; in rv7xx_parse_pplib_clock_info()
2329 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_engine_memory_ss() local
2332 pi->sclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv770_get_engine_memory_ss()
2334 pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv770_get_engine_memory_ss()
2337 if (pi->sclk_ss || pi->mclk_ss) in rv770_get_engine_memory_ss()
2338 pi->dynamic_ss = true; in rv770_get_engine_memory_ss()
2340 pi->dynamic_ss = false; in rv770_get_engine_memory_ss()
2345 struct rv7xx_power_info *pi; in rv770_dpm_init() local
2349 pi = kzalloc(sizeof(struct rv7xx_power_info), GFP_KERNEL); in rv770_dpm_init()
2350 if (pi == NULL) in rv770_dpm_init()
2352 rdev->pm.dpm.priv = pi; in rv770_dpm_init()
2356 pi->acpi_vddc = 0; in rv770_dpm_init()
2357 pi->min_vddc_in_table = 0; in rv770_dpm_init()
2358 pi->max_vddc_in_table = 0; in rv770_dpm_init()
2376 pi->ref_div = dividers.ref_div + 1; in rv770_dpm_init()
2378 pi->ref_div = R600_REFERENCEDIVIDER_DFLT; in rv770_dpm_init()
2380 pi->mclk_strobe_mode_threshold = 30000; in rv770_dpm_init()
2381 pi->mclk_edc_enable_threshold = 30000; in rv770_dpm_init()
2383 pi->rlp = RV770_RLP_DFLT; in rv770_dpm_init()
2384 pi->rmp = RV770_RMP_DFLT; in rv770_dpm_init()
2385 pi->lhp = RV770_LHP_DFLT; in rv770_dpm_init()
2386 pi->lmp = RV770_LMP_DFLT; in rv770_dpm_init()
2388 pi->voltage_control = in rv770_dpm_init()
2391 pi->mvdd_control = in rv770_dpm_init()
2396 pi->asi = RV770_ASI_DFLT; in rv770_dpm_init()
2397 pi->pasi = RV770_HASI_DFLT; in rv770_dpm_init()
2398 pi->vrc = RV770_VRC_DFLT; in rv770_dpm_init()
2400 pi->power_gating = false; in rv770_dpm_init()
2402 pi->gfx_clock_gating = true; in rv770_dpm_init()
2404 pi->mg_clock_gating = true; in rv770_dpm_init()
2405 pi->mgcgtssm = true; in rv770_dpm_init()
2407 pi->dynamic_pcie_gen2 = true; in rv770_dpm_init()
2410 pi->thermal_protection = true; in rv770_dpm_init()
2412 pi->thermal_protection = false; in rv770_dpm_init()
2414 pi->display_gap = true; in rv770_dpm_init()
2417 pi->dcodt = true; in rv770_dpm_init()
2419 pi->dcodt = false; in rv770_dpm_init()
2421 pi->ulps = true; in rv770_dpm_init()
2423 pi->mclk_stutter_mode_threshold = 0; in rv770_dpm_init()
2425 pi->sram_end = SMC_RAM_END; in rv770_dpm_init()
2426 pi->state_table_start = RV770_SMC_TABLE_ADDRESS; in rv770_dpm_init()
2427 pi->soft_regs_start = RV770_SMC_SOFT_REGISTERS_START; in rv770_dpm_init()