Lines Matching full:pi

43 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in rv730_populate_sclk_value()  local
45 u32 spll_func_cntl = pi->clk_regs.rv730.cg_spll_func_cntl; in rv730_populate_sclk_value()
46 u32 spll_func_cntl_2 = pi->clk_regs.rv730.cg_spll_func_cntl_2; in rv730_populate_sclk_value()
47 u32 spll_func_cntl_3 = pi->clk_regs.rv730.cg_spll_func_cntl_3; in rv730_populate_sclk_value()
48 u32 cg_spll_spread_spectrum = pi->clk_regs.rv730.cg_spll_spread_spectrum; in rv730_populate_sclk_value()
49 u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv730.cg_spll_spread_spectrum_2; in rv730_populate_sclk_value()
90 if (pi->sclk_ss) { in rv730_populate_sclk_value()
122 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_populate_mclk_value() local
123 u32 mclk_pwrmgt_cntl = pi->clk_regs.rv730.mclk_pwrmgt_cntl; in rv730_populate_mclk_value()
124 u32 dll_cntl = pi->clk_regs.rv730.dll_cntl; in rv730_populate_mclk_value()
125 u32 mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl; in rv730_populate_mclk_value()
126 u32 mpll_func_cntl_2 = pi->clk_regs.rv730.mpll_func_cntl2; in rv730_populate_mclk_value()
127 u32 mpll_func_cntl_3 = pi->clk_regs.rv730.mpll_func_cntl3; in rv730_populate_mclk_value()
128 u32 mpll_ss = pi->clk_regs.rv730.mpll_ss; in rv730_populate_mclk_value()
129 u32 mpll_ss2 = pi->clk_regs.rv730.mpll_ss2; in rv730_populate_mclk_value()
165 if (pi->mclk_ss) { in rv730_populate_mclk_value()
199 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_read_clock_registers() local
201 pi->clk_regs.rv730.cg_spll_func_cntl = in rv730_read_clock_registers()
203 pi->clk_regs.rv730.cg_spll_func_cntl_2 = in rv730_read_clock_registers()
205 pi->clk_regs.rv730.cg_spll_func_cntl_3 = in rv730_read_clock_registers()
207 pi->clk_regs.rv730.cg_spll_spread_spectrum = in rv730_read_clock_registers()
209 pi->clk_regs.rv730.cg_spll_spread_spectrum_2 = in rv730_read_clock_registers()
212 pi->clk_regs.rv730.mclk_pwrmgt_cntl = in rv730_read_clock_registers()
214 pi->clk_regs.rv730.dll_cntl = in rv730_read_clock_registers()
216 pi->clk_regs.rv730.mpll_func_cntl = in rv730_read_clock_registers()
218 pi->clk_regs.rv730.mpll_func_cntl2 = in rv730_read_clock_registers()
220 pi->clk_regs.rv730.mpll_func_cntl3 = in rv730_read_clock_registers()
222 pi->clk_regs.rv730.mpll_ss = in rv730_read_clock_registers()
224 pi->clk_regs.rv730.mpll_ss2 = in rv730_read_clock_registers()
231 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_populate_smc_acpi_state() local
244 if (pi->acpi_vddc) { in rv730_populate_smc_acpi_state()
245 rv770_populate_vddc_value(rdev, pi->acpi_vddc, in rv730_populate_smc_acpi_state()
247 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
248 pi->acpi_pcie_gen2 : 0; in rv730_populate_smc_acpi_state()
250 pi->acpi_pcie_gen2; in rv730_populate_smc_acpi_state()
252 rv770_populate_vddc_value(rdev, pi->min_vddc_in_table, in rv730_populate_smc_acpi_state()
257 mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl; in rv730_populate_smc_acpi_state()
258 mpll_func_cntl_2 = pi->clk_regs.rv730.mpll_func_cntl2; in rv730_populate_smc_acpi_state()
259 mpll_func_cntl_3 = pi->clk_regs.rv730.mpll_func_cntl3; in rv730_populate_smc_acpi_state()
286 spll_func_cntl = pi->clk_regs.rv730.cg_spll_func_cntl; in rv730_populate_smc_acpi_state()
287 spll_func_cntl_2 = pi->clk_regs.rv730.cg_spll_func_cntl_2; in rv730_populate_smc_acpi_state()
288 spll_func_cntl_3 = pi->clk_regs.rv730.cg_spll_func_cntl_3; in rv730_populate_smc_acpi_state()
323 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_populate_smc_initial_state() local
327 cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl); in rv730_populate_smc_initial_state()
329 cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl2); in rv730_populate_smc_initial_state()
331 cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl3); in rv730_populate_smc_initial_state()
333 cpu_to_be32(pi->clk_regs.rv730.mclk_pwrmgt_cntl); in rv730_populate_smc_initial_state()
335 cpu_to_be32(pi->clk_regs.rv730.dll_cntl); in rv730_populate_smc_initial_state()
337 cpu_to_be32(pi->clk_regs.rv730.mpll_ss); in rv730_populate_smc_initial_state()
339 cpu_to_be32(pi->clk_regs.rv730.mpll_ss2); in rv730_populate_smc_initial_state()
345 cpu_to_be32(pi->clk_regs.rv730.cg_spll_func_cntl); in rv730_populate_smc_initial_state()
347 cpu_to_be32(pi->clk_regs.rv730.cg_spll_func_cntl_2); in rv730_populate_smc_initial_state()
349 cpu_to_be32(pi->clk_regs.rv730.cg_spll_func_cntl_3); in rv730_populate_smc_initial_state()
351 cpu_to_be32(pi->clk_regs.rv730.cg_spll_spread_spectrum); in rv730_populate_smc_initial_state()
353 cpu_to_be32(pi->clk_regs.rv730.cg_spll_spread_spectrum_2); in rv730_populate_smc_initial_state()
373 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in rv730_populate_smc_initial_state()
375 if (pi->boot_in_gen2) in rv730_populate_smc_initial_state()
477 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_program_dcodt() local
483 mc4_io_pad_cntl |= pi->odt_value_0[i]; in rv730_program_dcodt()
489 mc4_io_pad_cntl |= pi->odt_value_1[i]; in rv730_program_dcodt()
496 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv730_get_odt_values() local
499 pi->odt_value_0[0] = (u8)0; in rv730_get_odt_values()
500 pi->odt_value_1[0] = (u8)0x80; in rv730_get_odt_values()
503 pi->odt_value_0[1] = (u8)(mc4_io_pad_cntl & 0xff); in rv730_get_odt_values()
506 pi->odt_value_1[1] = (u8)(mc4_io_pad_cntl & 0xff); in rv730_get_odt_values()