Lines Matching refs:new_state

431 	struct igp_ps *new_state = rs780_get_ps(new_ps);  in rs780_set_engine_clock_scaling()  local
435 if ((new_state->sclk_high == old_state->sclk_high) && in rs780_set_engine_clock_scaling()
436 (new_state->sclk_low == old_state->sclk_low)) in rs780_set_engine_clock_scaling()
440 new_state->sclk_low, false, &min_dividers); in rs780_set_engine_clock_scaling()
445 new_state->sclk_high, false, &max_dividers); in rs780_set_engine_clock_scaling()
478 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_engine_clock_spc() local
482 if ((new_state->sclk_high == old_state->sclk_high) && in rs780_set_engine_clock_spc()
483 (new_state->sclk_low == old_state->sclk_low)) in rs780_set_engine_clock_spc()
497 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_activate_engine_clk_scaling() local
500 if ((new_state->sclk_high == old_state->sclk_high) && in rs780_activate_engine_clk_scaling()
501 (new_state->sclk_low == old_state->sclk_low)) in rs780_activate_engine_clk_scaling()
504 if (new_state->sclk_high == new_state->sclk_low) in rs780_activate_engine_clk_scaling()
526 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_enable_voltage_scaling() local
532 if ((new_state->max_voltage == RS780_VDDC_LEVEL_HIGH) && in rs780_enable_voltage_scaling()
533 (new_state->min_voltage == RS780_VDDC_LEVEL_HIGH)) in rs780_enable_voltage_scaling()
537 new_state->max_voltage); in rs780_enable_voltage_scaling()
539 new_state->min_voltage); in rs780_enable_voltage_scaling()
568 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_uvd_clock_before_set_eng_clock() local
575 if (new_state->sclk_high >= current_state->sclk_high) in rs780_set_uvd_clock_before_set_eng_clock()
585 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_uvd_clock_after_set_eng_clock() local
592 if (new_state->sclk_high < current_state->sclk_high) in rs780_set_uvd_clock_after_set_eng_clock()