Lines Matching +full:battery +full:- +full:profile
24 #include <linux/hwmon-sysfs.h>
44 "Battery",
61 int found_instance = -1; in radeon_pm_get_type_index()
63 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
64 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
71 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
76 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { in radeon_pm_acpi_event_handler()
77 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
79 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
81 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
82 if (rdev->family == CHIP_ARUBA) { in radeon_pm_acpi_event_handler()
83 if (rdev->asic->dpm.enable_bapm) in radeon_pm_acpi_event_handler()
84 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
86 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
87 } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_acpi_event_handler()
88 if (rdev->pm.profile == PM_PROFILE_AUTO) { in radeon_pm_acpi_event_handler()
89 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
92 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
99 switch (rdev->pm.profile) { in radeon_pm_update_profile()
101 rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; in radeon_pm_update_profile()
105 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
106 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
108 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
110 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
111 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
113 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
117 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
118 rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; in radeon_pm_update_profile()
120 rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; in radeon_pm_update_profile()
123 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
124 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
126 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
129 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
130 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
132 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
136 if (rdev->pm.active_crtc_count == 0) { in radeon_pm_update_profile()
137 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
138 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; in radeon_pm_update_profile()
139 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
140 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; in radeon_pm_update_profile()
142 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
143 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; in radeon_pm_update_profile()
144 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
145 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; in radeon_pm_update_profile()
153 if (list_empty(&rdev->gem.objects)) in radeon_unmap_vram_bos()
156 list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { in radeon_unmap_vram_bos()
157 if (bo->tbo.mem.mem_type == TTM_PL_VRAM) in radeon_unmap_vram_bos()
158 ttm_bo_unmap_virtual(&bo->tbo); in radeon_unmap_vram_bos()
164 if (rdev->pm.active_crtcs) { in radeon_sync_with_vblank()
165 rdev->pm.vblank_sync = false; in radeon_sync_with_vblank()
167 rdev->irq.vblank_queue, rdev->pm.vblank_sync, in radeon_sync_with_vblank()
177 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_set_power_state()
178 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_set_power_state()
182 sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
183 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
184 if (sclk > rdev->pm.default_sclk) in radeon_set_power_state()
185 sclk = rdev->pm.default_sclk; in radeon_set_power_state()
191 if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && in radeon_set_power_state()
192 (rdev->family >= CHIP_BARTS) && in radeon_set_power_state()
193 rdev->pm.active_crtc_count && in radeon_set_power_state()
194 ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || in radeon_set_power_state()
195 (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) in radeon_set_power_state()
196 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
197 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
199 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
200 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
202 if (mclk > rdev->pm.default_mclk) in radeon_set_power_state()
203 mclk = rdev->pm.default_mclk; in radeon_set_power_state()
206 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()
211 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_set_power_state()
223 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()
227 rdev->pm.current_sclk = sclk; in radeon_set_power_state()
232 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { in radeon_set_power_state()
236 rdev->pm.current_mclk = mclk; in radeon_set_power_state()
246 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; in radeon_set_power_state()
247 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; in radeon_set_power_state()
258 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_pm_set_clocks()
259 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_pm_set_clocks()
262 down_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
263 mutex_lock(&rdev->ring_lock); in radeon_pm_set_clocks()
267 struct radeon_ring *ring = &rdev->ring[i]; in radeon_pm_set_clocks()
268 if (!ring->ready) { in radeon_pm_set_clocks()
274 mutex_unlock(&rdev->ring_lock); in radeon_pm_set_clocks()
275 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
282 if (rdev->irq.installed) { in radeon_pm_set_clocks()
284 drm_for_each_crtc(crtc, rdev->ddev) { in radeon_pm_set_clocks()
285 if (rdev->pm.active_crtcs & (1 << i)) { in radeon_pm_set_clocks()
288 rdev->pm.req_vblank |= (1 << i); in radeon_pm_set_clocks()
299 if (rdev->irq.installed) { in radeon_pm_set_clocks()
301 drm_for_each_crtc(crtc, rdev->ddev) { in radeon_pm_set_clocks()
302 if (rdev->pm.req_vblank & (1 << i)) { in radeon_pm_set_clocks()
303 rdev->pm.req_vblank &= ~(1 << i); in radeon_pm_set_clocks()
312 if (rdev->pm.active_crtc_count) in radeon_pm_set_clocks()
315 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_set_clocks()
317 mutex_unlock(&rdev->ring_lock); in radeon_pm_set_clocks()
318 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
327 DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); in radeon_pm_print_states()
328 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_print_states()
329 power_state = &rdev->pm.power_state[i]; in radeon_pm_print_states()
331 radeon_pm_state_type_name[power_state->type]); in radeon_pm_print_states()
332 if (i == rdev->pm.default_power_state_index) in radeon_pm_print_states()
334 if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) in radeon_pm_print_states()
335 DRM_DEBUG_DRIVER("\t%d PCIE Lanes\n", power_state->pcie_lanes); in radeon_pm_print_states()
336 if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) in radeon_pm_print_states()
338 DRM_DEBUG_DRIVER("\t%d Clock Mode(s)\n", power_state->num_clock_modes); in radeon_pm_print_states()
339 for (j = 0; j < power_state->num_clock_modes; j++) { in radeon_pm_print_states()
340 clock_info = &(power_state->clock_info[j]); in radeon_pm_print_states()
341 if (rdev->flags & RADEON_IS_IGP) in radeon_pm_print_states()
344 clock_info->sclk * 10); in radeon_pm_print_states()
348 clock_info->sclk * 10, in radeon_pm_print_states()
349 clock_info->mclk * 10, in radeon_pm_print_states()
350 clock_info->voltage.voltage); in radeon_pm_print_states()
360 struct radeon_device *rdev = ddev->dev_private; in radeon_get_pm_profile()
361 int cp = rdev->pm.profile; in radeon_get_pm_profile()
376 struct radeon_device *rdev = ddev->dev_private; in radeon_set_pm_profile()
378 /* Can't set profile when the card is off */ in radeon_set_pm_profile()
379 if ((rdev->flags & RADEON_IS_PX) && in radeon_set_pm_profile()
380 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in radeon_set_pm_profile()
381 return -EINVAL; in radeon_set_pm_profile()
383 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_profile()
384 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_set_pm_profile()
386 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_set_pm_profile()
388 rdev->pm.profile = PM_PROFILE_AUTO; in radeon_set_pm_profile()
390 rdev->pm.profile = PM_PROFILE_LOW; in radeon_set_pm_profile()
392 rdev->pm.profile = PM_PROFILE_MID; in radeon_set_pm_profile()
394 rdev->pm.profile = PM_PROFILE_HIGH; in radeon_set_pm_profile()
396 count = -EINVAL; in radeon_set_pm_profile()
402 count = -EINVAL; in radeon_set_pm_profile()
405 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_profile()
415 struct radeon_device *rdev = ddev->dev_private; in radeon_get_pm_method()
416 int pm = rdev->pm.pm_method; in radeon_get_pm_method()
420 (pm == PM_METHOD_PROFILE) ? "profile" : "dpm"); in radeon_get_pm_method()
429 struct radeon_device *rdev = ddev->dev_private; in radeon_set_pm_method()
432 if ((rdev->flags & RADEON_IS_PX) && in radeon_set_pm_method()
433 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) { in radeon_set_pm_method()
434 count = -EINVAL; in radeon_set_pm_method()
439 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_set_pm_method()
440 count = -EINVAL; in radeon_set_pm_method()
445 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
446 rdev->pm.pm_method = PM_METHOD_DYNPM; in radeon_set_pm_method()
447 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_set_pm_method()
448 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_set_pm_method()
449 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
450 } else if (strncmp("profile", buf, strlen("profile")) == 0) { in radeon_set_pm_method()
451 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
453 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_set_pm_method()
454 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_set_pm_method()
455 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_set_pm_method()
456 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
457 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_set_pm_method()
459 count = -EINVAL; in radeon_set_pm_method()
472 struct radeon_device *rdev = ddev->dev_private; in radeon_get_dpm_state()
473 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state()
476 (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : in radeon_get_dpm_state()
486 struct radeon_device *rdev = ddev->dev_private; in radeon_set_dpm_state()
488 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_state()
489 if (strncmp("battery", buf, strlen("battery")) == 0) in radeon_set_dpm_state()
490 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
492 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
494 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; in radeon_set_dpm_state()
496 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
497 count = -EINVAL; in radeon_set_dpm_state()
500 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
503 if (!(rdev->flags & RADEON_IS_PX) || in radeon_set_dpm_state()
504 (ddev->switch_power_state == DRM_SWITCH_POWER_ON)) in radeon_set_dpm_state()
516 struct radeon_device *rdev = ddev->dev_private; in radeon_get_dpm_forced_performance_level()
517 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_get_dpm_forced_performance_level()
519 if ((rdev->flags & RADEON_IS_PX) && in radeon_get_dpm_forced_performance_level()
520 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in radeon_get_dpm_forced_performance_level()
534 struct radeon_device *rdev = ddev->dev_private; in radeon_set_dpm_forced_performance_level()
539 if ((rdev->flags & RADEON_IS_PX) && in radeon_set_dpm_forced_performance_level()
540 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in radeon_set_dpm_forced_performance_level()
541 return -EINVAL; in radeon_set_dpm_forced_performance_level()
543 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
551 count = -EINVAL; in radeon_set_dpm_forced_performance_level()
554 if (rdev->asic->dpm.force_performance_level) { in radeon_set_dpm_forced_performance_level()
555 if (rdev->pm.dpm.thermal_active) { in radeon_set_dpm_forced_performance_level()
556 count = -EINVAL; in radeon_set_dpm_forced_performance_level()
561 count = -EINVAL; in radeon_set_dpm_forced_performance_level()
564 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
576 if (rdev->asic->dpm.fan_ctrl_get_mode) in radeon_hwmon_get_pwm1_enable()
577 pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev); in radeon_hwmon_get_pwm1_enable()
579 /* never 0 (full-speed), fuse or smc-controlled always */ in radeon_hwmon_get_pwm1_enable()
592 if(!rdev->asic->dpm.fan_ctrl_set_mode) in radeon_hwmon_set_pwm1_enable()
593 return -EINVAL; in radeon_hwmon_set_pwm1_enable()
600 case 1: /* manual, percent-based */ in radeon_hwmon_set_pwm1_enable()
601 rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC); in radeon_hwmon_set_pwm1_enable()
604 rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0); in radeon_hwmon_set_pwm1_enable()
639 err = rdev->asic->dpm.set_fan_speed_percent(rdev, value); in radeon_hwmon_set_pwm1()
654 err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed); in radeon_hwmon_get_pwm1()
675 struct drm_device *ddev = rdev->ddev; in radeon_hwmon_show_temp()
679 if ((rdev->flags & RADEON_IS_PX) && in radeon_hwmon_show_temp()
680 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in radeon_hwmon_show_temp()
681 return -EINVAL; in radeon_hwmon_show_temp()
683 if (rdev->asic->pm.get_temperature) in radeon_hwmon_show_temp()
696 int hyst = to_sensor_dev_attr(attr)->index; in radeon_hwmon_show_temp_thresh()
700 temp = rdev->pm.dpm.thermal.min_temp; in radeon_hwmon_show_temp_thresh()
702 temp = rdev->pm.dpm.thermal.max_temp; in radeon_hwmon_show_temp_thresh()
719 struct drm_device *ddev = rdev->ddev; in radeon_hwmon_show_sclk()
723 if ((rdev->flags & RADEON_IS_PX) && in radeon_hwmon_show_sclk()
724 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in radeon_hwmon_show_sclk()
725 return -EINVAL; in radeon_hwmon_show_sclk()
727 if (rdev->asic->dpm.get_current_sclk) in radeon_hwmon_show_sclk()
758 umode_t effective_mode = attr->mode; in hwmon_attributes_visible()
761 if (rdev->pm.pm_method != PM_METHOD_DPM && in hwmon_attributes_visible()
772 if (rdev->pm.no_fan && in hwmon_attributes_visible()
780 if ((!rdev->asic->dpm.get_fan_speed_percent && in hwmon_attributes_visible()
782 (!rdev->asic->dpm.fan_ctrl_get_mode && in hwmon_attributes_visible()
786 if ((!rdev->asic->dpm.set_fan_speed_percent && in hwmon_attributes_visible()
788 (!rdev->asic->dpm.fan_ctrl_set_mode && in hwmon_attributes_visible()
793 if ((!rdev->asic->dpm.set_fan_speed_percent && in hwmon_attributes_visible()
794 !rdev->asic->dpm.get_fan_speed_percent) && in hwmon_attributes_visible()
816 switch (rdev->pm.int_thermal_type) { in radeon_hwmon_init()
825 if (rdev->asic->pm.get_temperature == NULL) in radeon_hwmon_init()
827 rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev, in radeon_hwmon_init()
830 if (IS_ERR(rdev->pm.int_hwmon_dev)) { in radeon_hwmon_init()
831 err = PTR_ERR(rdev->pm.int_hwmon_dev); in radeon_hwmon_init()
832 dev_err(rdev->dev, in radeon_hwmon_init()
845 if (rdev->pm.int_hwmon_dev) in radeon_hwmon_fini()
846 hwmon_device_unregister(rdev->pm.int_hwmon_dev); in radeon_hwmon_fini()
857 if (!rdev->pm.dpm_enabled) in radeon_dpm_thermal_work_handler()
860 if (rdev->asic->pm.get_temperature) { in radeon_dpm_thermal_work_handler()
863 if (temp < rdev->pm.dpm.thermal.min_temp) in radeon_dpm_thermal_work_handler()
865 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
867 if (rdev->pm.dpm.thermal.high_to_low) in radeon_dpm_thermal_work_handler()
869 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
871 mutex_lock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
873 rdev->pm.dpm.thermal_active = true; in radeon_dpm_thermal_work_handler()
875 rdev->pm.dpm.thermal_active = false; in radeon_dpm_thermal_work_handler()
876 rdev->pm.dpm.state = dpm_state; in radeon_dpm_thermal_work_handler()
877 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
884 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? in radeon_dpm_single_display()
888 if (single_display && rdev->asic->dpm.vblank_too_short) { in radeon_dpm_single_display()
921 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_pick_power_state()
922 ps = &rdev->pm.dpm.ps[i]; in radeon_dpm_pick_power_state()
923 ui_class = ps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK; in radeon_dpm_pick_power_state()
928 if (ps->caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) { in radeon_dpm_pick_power_state()
937 if (ps->caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) { in radeon_dpm_pick_power_state()
946 if (ps->caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) { in radeon_dpm_pick_power_state()
955 if (rdev->pm.dpm.uvd_ps) in radeon_dpm_pick_power_state()
956 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
960 if (ps->class & ATOM_PPLIB_CLASSIFICATION_SDSTATE) in radeon_dpm_pick_power_state()
964 if (ps->class & ATOM_PPLIB_CLASSIFICATION_HDSTATE) in radeon_dpm_pick_power_state()
968 if (ps->class & ATOM_PPLIB_CLASSIFICATION_HD2STATE) in radeon_dpm_pick_power_state()
972 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) in radeon_dpm_pick_power_state()
976 return rdev->pm.dpm.boot_ps; in radeon_dpm_pick_power_state()
978 if (ps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL) in radeon_dpm_pick_power_state()
982 if (ps->class & ATOM_PPLIB_CLASSIFICATION_ACPI) in radeon_dpm_pick_power_state()
986 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) in radeon_dpm_pick_power_state()
990 if (ps->class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE) in radeon_dpm_pick_power_state()
1005 if (rdev->pm.dpm.uvd_ps) { in radeon_dpm_pick_power_state()
1006 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1038 if (!rdev->pm.dpm_enabled) in radeon_dpm_change_power_state_locked()
1041 if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) { in radeon_dpm_change_power_state_locked()
1043 if ((!rdev->pm.dpm.thermal_active) && in radeon_dpm_change_power_state_locked()
1044 (!rdev->pm.dpm.uvd_active)) in radeon_dpm_change_power_state_locked()
1045 rdev->pm.dpm.state = rdev->pm.dpm.user_state; in radeon_dpm_change_power_state_locked()
1047 dpm_state = rdev->pm.dpm.state; in radeon_dpm_change_power_state_locked()
1051 rdev->pm.dpm.requested_ps = ps; in radeon_dpm_change_power_state_locked()
1056 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { in radeon_dpm_change_power_state_locked()
1058 if (ps->vce_active != rdev->pm.dpm.vce_active) in radeon_dpm_change_power_state_locked()
1061 if (rdev->pm.dpm.single_display != single_display) in radeon_dpm_change_power_state_locked()
1063 if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) { in radeon_dpm_change_power_state_locked()
1064 /* for pre-BTC and APUs if the num crtcs changed but state is the same, in radeon_dpm_change_power_state_locked()
1067 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1072 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1073 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1081 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()
1082 rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1085 if ((rdev->pm.dpm.current_active_crtc_count > 1) && in radeon_dpm_change_power_state_locked()
1086 (rdev->pm.dpm.new_active_crtc_count > 1)) { in radeon_dpm_change_power_state_locked()
1091 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1092 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1102 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); in radeon_dpm_change_power_state_locked()
1104 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps); in radeon_dpm_change_power_state_locked()
1107 down_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1108 mutex_lock(&rdev->ring_lock); in radeon_dpm_change_power_state_locked()
1111 ps->vce_active = rdev->pm.dpm.vce_active; in radeon_dpm_change_power_state_locked()
1124 struct radeon_ring *ring = &rdev->ring[i]; in radeon_dpm_change_power_state_locked()
1125 if (ring->ready) in radeon_dpm_change_power_state_locked()
1133 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps; in radeon_dpm_change_power_state_locked()
1137 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1138 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1139 rdev->pm.dpm.single_display = single_display; in radeon_dpm_change_power_state_locked()
1141 if (rdev->asic->dpm.force_performance_level) { in radeon_dpm_change_power_state_locked()
1142 if (rdev->pm.dpm.thermal_active) { in radeon_dpm_change_power_state_locked()
1143 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_dpm_change_power_state_locked()
1147 rdev->pm.dpm.forced_level = level; in radeon_dpm_change_power_state_locked()
1150 radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); in radeon_dpm_change_power_state_locked()
1155 mutex_unlock(&rdev->ring_lock); in radeon_dpm_change_power_state_locked()
1156 up_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1163 if (rdev->asic->dpm.powergate_uvd) { in radeon_dpm_enable_uvd()
1164 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1167 enable |= rdev->pm.dpm.sd > 0; in radeon_dpm_enable_uvd()
1168 enable |= rdev->pm.dpm.hd > 0; in radeon_dpm_enable_uvd()
1171 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1174 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1175 rdev->pm.dpm.uvd_active = true; in radeon_dpm_enable_uvd()
1178 if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1180 else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1182 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1)) in radeon_dpm_enable_uvd()
1184 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) in radeon_dpm_enable_uvd()
1189 rdev->pm.dpm.state = dpm_state; in radeon_dpm_enable_uvd()
1190 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1192 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1193 rdev->pm.dpm.uvd_active = false; in radeon_dpm_enable_uvd()
1194 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1204 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1205 rdev->pm.dpm.vce_active = true; in radeon_dpm_enable_vce()
1207 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; in radeon_dpm_enable_vce()
1208 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1210 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1211 rdev->pm.dpm.vce_active = false; in radeon_dpm_enable_vce()
1212 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1220 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1221 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_suspend_old()
1222 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) in radeon_pm_suspend_old()
1223 rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED; in radeon_pm_suspend_old()
1225 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1227 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_suspend_old()
1232 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1236 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_suspend_dpm()
1237 rdev->pm.dpm_enabled = false; in radeon_pm_suspend_dpm()
1238 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1243 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_suspend()
1252 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_resume_old()
1253 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_resume_old()
1254 rdev->mc_fw) { in radeon_pm_resume_old()
1255 if (rdev->pm.default_vddc) in radeon_pm_resume_old()
1256 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_old()
1258 if (rdev->pm.default_vddci) in radeon_pm_resume_old()
1259 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_old()
1261 if (rdev->pm.default_sclk) in radeon_pm_resume_old()
1262 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_old()
1263 if (rdev->pm.default_mclk) in radeon_pm_resume_old()
1264 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_old()
1267 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_old()
1268 rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; in radeon_pm_resume_old()
1269 rdev->pm.current_clock_mode_index = 0; in radeon_pm_resume_old()
1270 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()
1271 rdev->pm.current_mclk = rdev->pm.default_mclk; in radeon_pm_resume_old()
1272 if (rdev->pm.power_state) { in radeon_pm_resume_old()
1273 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
1274 …rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vo… in radeon_pm_resume_old()
1276 if (rdev->pm.pm_method == PM_METHOD_DYNPM in radeon_pm_resume_old()
1277 && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { in radeon_pm_resume_old()
1278 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_resume_old()
1279 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_resume_old()
1282 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_old()
1291 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1292 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_resume_dpm()
1295 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1298 rdev->pm.dpm_enabled = true; in radeon_pm_resume_dpm()
1303 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_resume_dpm()
1304 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_resume_dpm()
1305 rdev->mc_fw) { in radeon_pm_resume_dpm()
1306 if (rdev->pm.default_vddc) in radeon_pm_resume_dpm()
1307 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_dpm()
1309 if (rdev->pm.default_vddci) in radeon_pm_resume_dpm()
1310 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_dpm()
1312 if (rdev->pm.default_sclk) in radeon_pm_resume_dpm()
1313 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_dpm()
1314 if (rdev->pm.default_mclk) in radeon_pm_resume_dpm()
1315 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_dpm()
1321 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_resume()
1331 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_init_old()
1332 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_init_old()
1333 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_init_old()
1334 rdev->pm.dynpm_can_upclock = true; in radeon_pm_init_old()
1335 rdev->pm.dynpm_can_downclock = true; in radeon_pm_init_old()
1336 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1337 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1338 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1339 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1340 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_old()
1342 if (rdev->bios) { in radeon_pm_init_old()
1343 if (rdev->is_atom_bios) in radeon_pm_init_old()
1350 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_init_old()
1351 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_init_old()
1352 rdev->mc_fw) { in radeon_pm_init_old()
1353 if (rdev->pm.default_vddc) in radeon_pm_init_old()
1354 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_old()
1356 if (rdev->pm.default_vddci) in radeon_pm_init_old()
1357 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_old()
1359 if (rdev->pm.default_sclk) in radeon_pm_init_old()
1360 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_old()
1361 if (rdev->pm.default_mclk) in radeon_pm_init_old()
1362 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_old()
1371 INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); in radeon_pm_init_old()
1373 if (rdev->pm.num_power_states > 1) { in radeon_pm_init_old()
1388 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_print_power_states()
1390 radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]); in radeon_dpm_print_power_states()
1399 rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1400 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1401 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; in radeon_pm_init_dpm()
1402 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1403 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1404 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1405 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1406 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_dpm()
1408 if (rdev->bios && rdev->is_atom_bios) in radeon_pm_init_dpm()
1411 return -EINVAL; in radeon_pm_init_dpm()
1418 INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler); in radeon_pm_init_dpm()
1419 mutex_lock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1421 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_init_dpm()
1426 mutex_unlock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1429 rdev->pm.dpm_enabled = true; in radeon_pm_init_dpm()
1440 rdev->pm.dpm_enabled = false; in radeon_pm_init_dpm()
1441 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_init_dpm()
1442 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_init_dpm()
1443 rdev->mc_fw) { in radeon_pm_init_dpm()
1444 if (rdev->pm.default_vddc) in radeon_pm_init_dpm()
1445 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_dpm()
1447 if (rdev->pm.default_vddci) in radeon_pm_init_dpm()
1448 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_dpm()
1450 if (rdev->pm.default_sclk) in radeon_pm_init_dpm()
1451 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_dpm()
1452 if (rdev->pm.default_mclk) in radeon_pm_init_dpm()
1453 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_dpm()
1468 /* TURKS - https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1386534 */
1470 /* TURKS - https://bugzilla.kernel.org/show_bug.cgi?id=83731 */
1481 while (p && p->chip_device != 0) { in radeon_pm_init()
1482 if (rdev->pdev->vendor == p->chip_vendor && in radeon_pm_init()
1483 rdev->pdev->device == p->chip_device && in radeon_pm_init()
1484 rdev->pdev->subsystem_vendor == p->subsys_vendor && in radeon_pm_init()
1485 rdev->pdev->subsystem_device == p->subsys_device) { in radeon_pm_init()
1493 switch (rdev->family) { in radeon_pm_init()
1503 if (!rdev->rlc_fw) in radeon_pm_init()
1504 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1505 else if ((rdev->family >= CHIP_RV770) && in radeon_pm_init()
1506 (!(rdev->flags & RADEON_IS_IGP)) && in radeon_pm_init()
1507 (!rdev->smc_fw)) in radeon_pm_init()
1508 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1510 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1512 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1541 if (!rdev->rlc_fw) in radeon_pm_init()
1542 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1543 else if ((rdev->family >= CHIP_RV770) && in radeon_pm_init()
1544 (!(rdev->flags & RADEON_IS_IGP)) && in radeon_pm_init()
1545 (!rdev->smc_fw)) in radeon_pm_init()
1546 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1547 else if (disable_dpm && (radeon_dpm == -1)) in radeon_pm_init()
1548 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1550 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1552 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1555 /* default to profile method */ in radeon_pm_init()
1556 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1560 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_init()
1570 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_pm_late_init()
1571 if (rdev->pm.dpm_enabled) { in radeon_pm_late_init()
1572 if (!rdev->pm.sysfs_initialized) { in radeon_pm_late_init()
1573 ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state); in radeon_pm_late_init()
1576 ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); in radeon_pm_late_init()
1580 ret = device_create_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_late_init()
1582 DRM_ERROR("failed to create device file for power profile\n"); in radeon_pm_late_init()
1583 ret = device_create_file(rdev->dev, &dev_attr_power_method); in radeon_pm_late_init()
1586 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1589 mutex_lock(&rdev->pm.mutex); in radeon_pm_late_init()
1591 mutex_unlock(&rdev->pm.mutex); in radeon_pm_late_init()
1593 rdev->pm.dpm_enabled = false; in radeon_pm_late_init()
1603 if ((rdev->pm.num_power_states > 1) && in radeon_pm_late_init()
1604 (!rdev->pm.sysfs_initialized)) { in radeon_pm_late_init()
1606 ret = device_create_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_late_init()
1608 DRM_ERROR("failed to create device file for power profile\n"); in radeon_pm_late_init()
1609 ret = device_create_file(rdev->dev, &dev_attr_power_method); in radeon_pm_late_init()
1613 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1621 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_old()
1622 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_old()
1623 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_fini_old()
1624 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_fini_old()
1627 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_fini_old()
1629 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_fini_old()
1630 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_fini_old()
1633 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_old()
1635 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_fini_old()
1637 device_remove_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_fini_old()
1638 device_remove_file(rdev->dev, &dev_attr_power_method); in radeon_pm_fini_old()
1642 kfree(rdev->pm.power_state); in radeon_pm_fini_old()
1647 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_dpm()
1648 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1650 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1652 device_remove_file(rdev->dev, &dev_attr_power_dpm_state); in radeon_pm_fini_dpm()
1653 device_remove_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); in radeon_pm_fini_dpm()
1655 device_remove_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_fini_dpm()
1656 device_remove_file(rdev->dev, &dev_attr_power_method); in radeon_pm_fini_dpm()
1661 kfree(rdev->pm.power_state); in radeon_pm_fini_dpm()
1666 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_fini()
1674 struct drm_device *ddev = rdev->ddev; in radeon_pm_compute_clocks_old()
1678 if (rdev->pm.num_power_states < 2) in radeon_pm_compute_clocks_old()
1681 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1683 rdev->pm.active_crtcs = 0; in radeon_pm_compute_clocks_old()
1684 rdev->pm.active_crtc_count = 0; in radeon_pm_compute_clocks_old()
1685 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { in radeon_pm_compute_clocks_old()
1687 &ddev->mode_config.crtc_list, head) { in radeon_pm_compute_clocks_old()
1689 if (radeon_crtc->enabled) { in radeon_pm_compute_clocks_old()
1690 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_old()
1691 rdev->pm.active_crtc_count++; in radeon_pm_compute_clocks_old()
1696 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_compute_clocks_old()
1699 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_compute_clocks_old()
1700 if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { in radeon_pm_compute_clocks_old()
1701 if (rdev->pm.active_crtc_count > 1) { in radeon_pm_compute_clocks_old()
1702 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_pm_compute_clocks_old()
1703 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1705 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_pm_compute_clocks_old()
1706 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_compute_clocks_old()
1712 } else if (rdev->pm.active_crtc_count == 1) { in radeon_pm_compute_clocks_old()
1715 if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1716 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1717 rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; in radeon_pm_compute_clocks_old()
1721 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1723 } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { in radeon_pm_compute_clocks_old()
1724 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1725 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1730 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1731 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1733 rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; in radeon_pm_compute_clocks_old()
1734 rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; in radeon_pm_compute_clocks_old()
1742 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1747 struct drm_device *ddev = rdev->ddev; in radeon_pm_compute_clocks_dpm()
1751 if (!rdev->pm.dpm_enabled) in radeon_pm_compute_clocks_dpm()
1754 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1757 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()
1758 rdev->pm.dpm.new_active_crtc_count = 0; in radeon_pm_compute_clocks_dpm()
1759 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { in radeon_pm_compute_clocks_dpm()
1761 &ddev->mode_config.crtc_list, head) { in radeon_pm_compute_clocks_dpm()
1763 if (crtc->enabled) { in radeon_pm_compute_clocks_dpm()
1764 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1765 rdev->pm.dpm.new_active_crtc_count++; in radeon_pm_compute_clocks_dpm()
1770 /* update battery/ac status */ in radeon_pm_compute_clocks_dpm()
1772 rdev->pm.dpm.ac_power = true; in radeon_pm_compute_clocks_dpm()
1774 rdev->pm.dpm.ac_power = false; in radeon_pm_compute_clocks_dpm()
1778 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1784 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_compute_clocks()
1798 for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) { in radeon_pm_in_vbl()
1799 if (rdev->pm.active_crtcs & (1 << crtc)) { in radeon_pm_in_vbl()
1800 vbl_status = radeon_get_crtc_scanoutpos(rdev->ddev, in radeon_pm_in_vbl()
1804 &rdev->mode_info.crtcs[crtc]->base.hwmode); in radeon_pm_in_vbl()
1832 resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); in radeon_dynpm_idle_work_handler()
1833 mutex_lock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1834 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_dynpm_idle_work_handler()
1839 struct radeon_ring *ring = &rdev->ring[i]; in radeon_dynpm_idle_work_handler()
1841 if (ring->ready) { in radeon_dynpm_idle_work_handler()
1849 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { in radeon_dynpm_idle_work_handler()
1850 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1851 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1852 rdev->pm.dynpm_can_upclock) { in radeon_dynpm_idle_work_handler()
1853 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1855 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1859 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { in radeon_dynpm_idle_work_handler()
1860 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1861 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1862 rdev->pm.dynpm_can_downclock) { in radeon_dynpm_idle_work_handler()
1863 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1865 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1873 if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1874 jiffies > rdev->pm.dynpm_action_timeout) { in radeon_dynpm_idle_work_handler()
1879 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_dynpm_idle_work_handler()
1882 mutex_unlock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1883 ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); in radeon_dynpm_idle_work_handler()
1893 struct drm_info_node *node = (struct drm_info_node *) m->private; in radeon_debugfs_pm_info()
1894 struct drm_device *dev = node->minor->dev; in radeon_debugfs_pm_info()
1895 struct radeon_device *rdev = dev->dev_private; in radeon_debugfs_pm_info()
1896 struct drm_device *ddev = rdev->ddev; in radeon_debugfs_pm_info()
1898 if ((rdev->flags & RADEON_IS_PX) && in radeon_debugfs_pm_info()
1899 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) { in radeon_debugfs_pm_info()
1901 } else if (rdev->pm.dpm_enabled) { in radeon_debugfs_pm_info()
1902 mutex_lock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1903 if (rdev->asic->dpm.debugfs_print_current_performance_level) in radeon_debugfs_pm_info()
1907 mutex_unlock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1909 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); in radeon_debugfs_pm_info()
1911 if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP)) in radeon_debugfs_pm_info()
1912 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info()
1915 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); in radeon_debugfs_pm_info()
1916 if (rdev->asic->pm.get_memory_clock) in radeon_debugfs_pm_info()
1918 if (rdev->pm.current_vddc) in radeon_debugfs_pm_info()
1919 seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); in radeon_debugfs_pm_info()
1920 if (rdev->asic->pm.get_pcie_lanes) in radeon_debugfs_pm_info()