424 	int ddc_line = 0;  in combios_setup_i2c_bus()  local
451 		ddc_line = 0;  in combios_setup_i2c_bus()
454 		ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
457 		ddc_line = RADEON_GPIO_VGA_DDC;  in combios_setup_i2c_bus()
460 		ddc_line = RADEON_GPIOPAD_MASK;  in combios_setup_i2c_bus()
463 		ddc_line = RADEON_MDGPIO_MASK;  in combios_setup_i2c_bus()
469 			ddc_line = RADEON_GPIOPAD_MASK;  in combios_setup_i2c_bus()
472 			ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
475 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
481 			ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
486 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
488 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
491 			ddc_line = RADEON_GPIO_CRT2_DDC;  in combios_setup_i2c_bus()
495 	if (ddc_line == RADEON_GPIOPAD_MASK) {  in combios_setup_i2c_bus()
504 	} else if (ddc_line == RADEON_MDGPIO_MASK) {  in combios_setup_i2c_bus()
514 		i2c.mask_clk_reg = ddc_line;  in combios_setup_i2c_bus()
515 		i2c.mask_data_reg = ddc_line;  in combios_setup_i2c_bus()
516 		i2c.a_clk_reg = ddc_line;  in combios_setup_i2c_bus()
517 		i2c.a_data_reg = ddc_line;  in combios_setup_i2c_bus()
518 		i2c.en_clk_reg = ddc_line;  in combios_setup_i2c_bus()
519 		i2c.en_data_reg = ddc_line;  in combios_setup_i2c_bus()
520 		i2c.y_clk_reg = ddc_line;  in combios_setup_i2c_bus()
521 		i2c.y_data_reg = ddc_line;  in combios_setup_i2c_bus()
534 	} else if ((ddc_line == RADEON_GPIOPAD_MASK) ||  in combios_setup_i2c_bus()
535 		   (ddc_line == RADEON_MDGPIO_MASK)) {  in combios_setup_i2c_bus()
564 		switch (ddc_line) {  in combios_setup_i2c_bus()
574 		switch (ddc_line) {  in combios_setup_i2c_bus()
586 		switch (ddc_line) {  in combios_setup_i2c_bus()
599 		switch (ddc_line) {  in combios_setup_i2c_bus()
613 		switch (ddc_line) {  in combios_setup_i2c_bus()
638 	if (ddc_line)  in combios_setup_i2c_bus()