61 	return (rptr & 0x3fffc) >> 2;  in r600_dma_get_rptr()
75 	return (RREG32(DMA_RB_WPTR) & 0x3fffc) >> 2;  in r600_dma_get_wptr()
89 	WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc);  in r600_dma_set_wptr()
118  * Returns 0 for success, error for failure.
127 	WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL, 0);  in r600_dma_resume()
128 	WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL, 0);  in r600_dma_resume()
139 	WREG32(DMA_RB_RPTR, 0);  in r600_dma_resume()
140 	WREG32(DMA_RB_WPTR, 0);  in r600_dma_resume()
144 	       upper_32_bits(rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFF);  in r600_dma_resume()
146 	       ((rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFFFFFFFC));  in r600_dma_resume()
167 	ring->wptr = 0;  in r600_dma_resume()
183 	return 0;  in r600_dma_resume()
228  * Returns 0 for success, error for failure.
246 	tmp = 0xCAFEDEAD;  in r600_dma_ring_test()
254 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1));  in r600_dma_ring_test()
256 	radeon_ring_write(ring, upper_32_bits(gpu_addr) & 0xff);  in r600_dma_ring_test()
257 	radeon_ring_write(ring, 0xDEADBEEF);  in r600_dma_ring_test()
260 	for (i = 0; i < rdev->usec_timeout; i++) {  in r600_dma_ring_test()
262 		if (tmp == 0xDEADBEEF)  in r600_dma_ring_test()
270 		DRM_ERROR("radeon: ring %d test failed (0x%08X)\n",  in r600_dma_ring_test()
294 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_FENCE, 0, 0, 0));  in r600_dma_fence_ring_emit()
295 	radeon_ring_write(ring, addr & 0xfffffffc);  in r600_dma_fence_ring_emit()
296 	radeon_ring_write(ring, (upper_32_bits(addr) & 0xff));  in r600_dma_fence_ring_emit()
299 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_TRAP, 0, 0, 0));  in r600_dma_fence_ring_emit()
319 	u32 s = emit_wait ? 0 : 1;  in r600_dma_semaphore_ring_emit()
321 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SEMAPHORE, 0, s, 0));  in r600_dma_semaphore_ring_emit()
322 	radeon_ring_write(ring, addr & 0xfffffffc);  in r600_dma_semaphore_ring_emit()
323 	radeon_ring_write(ring, upper_32_bits(addr) & 0xff);  in r600_dma_semaphore_ring_emit()
335  * Returns 0 on success, error on failure.
343 	u32 tmp = 0;  in r600_dma_ib_test()
359 	ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1);  in r600_dma_ib_test()
361 	ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff;  in r600_dma_ib_test()
362 	ib.ptr[3] = 0xDEADBEEF;  in r600_dma_ib_test()
373 	if (r < 0) {  in r600_dma_ib_test()
376 	} else if (r == 0) {  in r600_dma_ib_test()
380 	r = 0;  in r600_dma_ib_test()
381 	for (i = 0; i < rdev->usec_timeout; i++) {  in r600_dma_ib_test()
383 		if (tmp == 0xDEADBEEF)  in r600_dma_ib_test()
390 		DRM_ERROR("radeon: ib test failed (0x%08X)\n", tmp);  in r600_dma_ib_test()
414 		radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1));  in r600_dma_ring_ib_execute()
415 		radeon_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc);  in r600_dma_ring_ib_execute()
416 		radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff);  in r600_dma_ring_ib_execute()
424 		radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0));  in r600_dma_ring_ib_execute()
425 	radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_INDIRECT_BUFFER, 0, 0, 0));  in r600_dma_ring_ib_execute()
426 	radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0));  in r600_dma_ring_ib_execute()
427 	radeon_ring_write(ring, (ib->length_dw << 16) | (upper_32_bits(ib->gpu_addr) & 0xFF));  in r600_dma_ring_ib_execute()
455 	int r = 0;  in r600_copy_dma()
460 	num_loops = DIV_ROUND_UP(size_in_dw, 0xFFFE);  in r600_copy_dma()
471 	for (i = 0; i < num_loops; i++) {  in r600_copy_dma()
473 		if (cur_size_in_dw > 0xFFFE)  in r600_copy_dma()
474 			cur_size_in_dw = 0xFFFE;  in r600_copy_dma()
476 		radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_COPY, 0, 0, cur_size_in_dw));  in r600_copy_dma()
477 		radeon_ring_write(ring, dst_offset & 0xfffffffc);  in r600_copy_dma()
478 		radeon_ring_write(ring, src_offset & 0xfffffffc);  in r600_copy_dma()
479 		radeon_ring_write(ring, (((upper_32_bits(dst_offset) & 0xff) << 16) |  in r600_copy_dma()
480 					 (upper_32_bits(src_offset) & 0xff)));  in r600_copy_dma()