1225 	u32 reference_clock;  in ni_program_response_times()  local
1241 	reference_clock = radeon_get_xclk(rdev);  in ni_program_response_times()
1243 	vddc_dly = (voltage_response_time  * reference_clock) / 1600;  in ni_program_response_times()
1244 	bb_dly   = (backbias_response_time * reference_clock) / 1600;  in ni_program_response_times()
1245 	acpi_dly = (acpi_delay_time * reference_clock) / 1600;  in ni_program_response_times()
1246 	vbi_dly  = (vbi_time_out * reference_clock) / 1600;  in ni_program_response_times()
1248 	mclk_switch_limit = (460 * reference_clock) / 100;  in ni_program_response_times()
2011 	u32 reference_clock = rdev->clock.spll.reference_freq;  in ni_calculate_sclk_params()  local
2025 	do_div(tmp, reference_clock);  in ni_calculate_sclk_params()
2045 			u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate);  in ni_calculate_sclk_params()
2241 			u32 reference_clock = rdev->clock.mpll.reference_freq;  in ni_populate_mclk_value()  local
2243 			u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate);  in ni_populate_mclk_value()