45 					   struct radeon_ps *new_rps);
51 					struct radeon_ps *new_rps,
1707 				     struct radeon_ps *new_rps)  in kv_set_valid_clock_range()  argument
1709 	struct kv_ps *new_ps = kv_get_ps(new_rps);  in kv_set_valid_clock_range()
1769 					 struct radeon_ps *new_rps)  in kv_update_dfs_bypass_settings()  argument
1771 	struct kv_ps *new_ps = kv_get_ps(new_rps);  in kv_update_dfs_bypass_settings()
2139 					struct radeon_ps *new_rps,  in kv_apply_state_adjust_rules()  argument
2142 	struct kv_ps *ps = kv_get_ps(new_rps);  in kv_apply_state_adjust_rules()
2154 	if (new_rps->vce_active) {  in kv_apply_state_adjust_rules()
2155 		new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;  in kv_apply_state_adjust_rules()
2156 		new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;  in kv_apply_state_adjust_rules()
2158 		new_rps->evclk = 0;  in kv_apply_state_adjust_rules()
2159 		new_rps->ecclk = 0;  in kv_apply_state_adjust_rules()
2181 	if (new_rps->vce_active) {  in kv_apply_state_adjust_rules()
2222 	pi->video_start = new_rps->dclk || new_rps->vclk ||  in kv_apply_state_adjust_rules()
2223 		new_rps->evclk || new_rps->ecclk;  in kv_apply_state_adjust_rules()
2225 	if ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) ==  in kv_apply_state_adjust_rules()
2431 					   struct radeon_ps *new_rps)  in kv_program_nbps_index_settings()  argument
2433 	struct kv_ps *new_ps = kv_get_ps(new_rps);  in kv_program_nbps_index_settings()