535 				u32 index, u32 sclk)  in kv_set_divider_value()  argument
542 					     sclk, false, &dividers);  in kv_set_divider_value()
547 	pi->graphics_level[index].SclkFrequency = cpu_to_be32(sclk);  in kv_set_divider_value()
724 			if (table->entries[i].clk == pi->boot_pl.sclk)  in kv_program_bootup_state()
738 			if (table->entries[i].sclk_frequency == pi->boot_pl.sclk)  in kv_program_bootup_state()
1717 			if ((table->entries[i].clk >= new_ps->levels[0].sclk) ||  in kv_set_valid_clock_range()
1725 			if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)  in kv_set_valid_clock_range()
1731 			if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) >  in kv_set_valid_clock_range()
1732 			    (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))  in kv_set_valid_clock_range()
1742 			if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk ||  in kv_set_valid_clock_range()
1751 			    new_ps->levels[new_ps->num_levels - 1].sclk)  in kv_set_valid_clock_range()
1757 			if ((new_ps->levels[0].sclk -  in kv_set_valid_clock_range()
1760 			     new_ps->levels[new_ps->num_levels -1].sclk))  in kv_set_valid_clock_range()
1974 		table->sclk =  in kv_construct_max_power_limits_table()
2030 	pi->boot_pl.sclk = pi->sys_info.bootup_sclk;  in kv_construct_boot_state()
2081 					     u32 sclk, u32 min_sclk_in_sr)  in kv_get_sleep_divider_id_from_clock()  argument
2089 	if (sclk < min)  in kv_get_sleep_divider_id_from_clock()
2096 		temp = sclk / sumo_get_sleep_divider_from_id(i);  in kv_get_sleep_divider_id_from_clock()
2145 	u32 sclk, mclk = 0;  in kv_apply_state_adjust_rules()  local
2163 	sclk = min_sclk;  in kv_apply_state_adjust_rules()
2166 		stable_p_state_sclk = (max_limits->sclk * 75) / 100;  in kv_apply_state_adjust_rules()
2178 		sclk = stable_p_state_sclk;  in kv_apply_state_adjust_rules()
2182 		if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk)  in kv_apply_state_adjust_rules()
2183 			sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk;  in kv_apply_state_adjust_rules()
2189 		if (ps->levels[i].sclk < sclk)  in kv_apply_state_adjust_rules()
2190 			ps->levels[i].sclk = sclk;  in kv_apply_state_adjust_rules()
2199 				ps->levels[i].sclk = table->entries[limit].clk;  in kv_apply_state_adjust_rules()
2211 				ps->levels[i].sclk = table->entries[limit].sclk_frequency;  in kv_apply_state_adjust_rules()
2218 			ps->levels[i].sclk = stable_p_state_sclk;  in kv_apply_state_adjust_rules()
2617 	u32 sclk;  in kv_parse_pplib_clock_info()  local
2619 	sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);  in kv_parse_pplib_clock_info()
2620 	sclk |= clock_info->sumo.ucEngineClockHigh << 16;  in kv_parse_pplib_clock_info()
2621 	pl->sclk = sclk;  in kv_parse_pplib_clock_info()
2709 		u32 sclk;  in kv_parse_power_table()  local
2713 		sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);  in kv_parse_power_table()
2714 		sclk |= clock_info->sumo.ucEngineClockHigh << 16;  in kv_parse_power_table()
2715 		rdev->pm.dpm.vce_states[i].sclk = sclk;  in kv_parse_power_table()
2808 	u32 sclk, tmp;  in kv_dpm_debugfs_print_current_performance_level()  local
2814 		sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);  in kv_dpm_debugfs_print_current_performance_level()
2820 		seq_printf(m, "power level %d    sclk: %u vddc: %u\n",  in kv_dpm_debugfs_print_current_performance_level()
2821 			   current_index, sclk, vddc);  in kv_dpm_debugfs_print_current_performance_level()
2831 	u32 sclk;  in kv_dpm_get_current_sclk()  local
2836 		sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);  in kv_dpm_get_current_sclk()
2837 		return sclk;  in kv_dpm_get_current_sclk()
2859 		printk("\t\tpower level %d    sclk: %u vddc: %u\n",  in kv_dpm_print_power_state()
2860 		       i, pl->sclk,  in kv_dpm_print_power_state()
2889 		return requested_state->levels[0].sclk;  in kv_dpm_get_sclk()
2891 		return requested_state->levels[requested_state->num_levels - 1].sclk;  in kv_dpm_get_sclk()