4504 	struct hqd_registers queue_state;  member
4625 		mqd->queue_state.cp_hqd_pq_doorbell_control =  in cik_cp_compute_resume()
4628 			mqd->queue_state.cp_hqd_pq_doorbell_control |= DOORBELL_EN;  in cik_cp_compute_resume()
4630 			mqd->queue_state.cp_hqd_pq_doorbell_control &= ~DOORBELL_EN;  in cik_cp_compute_resume()
4632 		       mqd->queue_state.cp_hqd_pq_doorbell_control);  in cik_cp_compute_resume()
4635 		mqd->queue_state.cp_hqd_dequeue_request = 0;  in cik_cp_compute_resume()
4636 		mqd->queue_state.cp_hqd_pq_rptr = 0;  in cik_cp_compute_resume()
4637 		mqd->queue_state.cp_hqd_pq_wptr= 0;  in cik_cp_compute_resume()
4645 			WREG32(CP_HQD_DEQUEUE_REQUEST, mqd->queue_state.cp_hqd_dequeue_request);  in cik_cp_compute_resume()
4646 			WREG32(CP_HQD_PQ_RPTR, mqd->queue_state.cp_hqd_pq_rptr);  in cik_cp_compute_resume()
4647 			WREG32(CP_HQD_PQ_WPTR, mqd->queue_state.cp_hqd_pq_wptr);  in cik_cp_compute_resume()
4651 		mqd->queue_state.cp_mqd_base_addr = mqd_gpu_addr & 0xfffffffc;  in cik_cp_compute_resume()
4652 		mqd->queue_state.cp_mqd_base_addr_hi = upper_32_bits(mqd_gpu_addr);  in cik_cp_compute_resume()
4653 		WREG32(CP_MQD_BASE_ADDR, mqd->queue_state.cp_mqd_base_addr);  in cik_cp_compute_resume()
4654 		WREG32(CP_MQD_BASE_ADDR_HI, mqd->queue_state.cp_mqd_base_addr_hi);  in cik_cp_compute_resume()
4656 		mqd->queue_state.cp_mqd_control = RREG32(CP_MQD_CONTROL);  in cik_cp_compute_resume()
4657 		mqd->queue_state.cp_mqd_control &= ~MQD_VMID_MASK;  in cik_cp_compute_resume()
4658 		WREG32(CP_MQD_CONTROL, mqd->queue_state.cp_mqd_control);  in cik_cp_compute_resume()
4662 		mqd->queue_state.cp_hqd_pq_base = hqd_gpu_addr;  in cik_cp_compute_resume()
4663 		mqd->queue_state.cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr);  in cik_cp_compute_resume()
4664 		WREG32(CP_HQD_PQ_BASE, mqd->queue_state.cp_hqd_pq_base);  in cik_cp_compute_resume()
4665 		WREG32(CP_HQD_PQ_BASE_HI, mqd->queue_state.cp_hqd_pq_base_hi);  in cik_cp_compute_resume()
4668 		mqd->queue_state.cp_hqd_pq_control = RREG32(CP_HQD_PQ_CONTROL);  in cik_cp_compute_resume()
4669 		mqd->queue_state.cp_hqd_pq_control &=  in cik_cp_compute_resume()
4672 		mqd->queue_state.cp_hqd_pq_control |=  in cik_cp_compute_resume()
4674 		mqd->queue_state.cp_hqd_pq_control |=  in cik_cp_compute_resume()
4677 		mqd->queue_state.cp_hqd_pq_control |= BUF_SWAP_32BIT;  in cik_cp_compute_resume()
4679 		mqd->queue_state.cp_hqd_pq_control &=  in cik_cp_compute_resume()
4681 		mqd->queue_state.cp_hqd_pq_control |=  in cik_cp_compute_resume()
4683 		WREG32(CP_HQD_PQ_CONTROL, mqd->queue_state.cp_hqd_pq_control);  in cik_cp_compute_resume()
4690 		mqd->queue_state.cp_hqd_pq_wptr_poll_addr = wb_gpu_addr & 0xfffffffc;  in cik_cp_compute_resume()
4691 		mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff;  in cik_cp_compute_resume()
4692 		WREG32(CP_HQD_PQ_WPTR_POLL_ADDR, mqd->queue_state.cp_hqd_pq_wptr_poll_addr);  in cik_cp_compute_resume()
4694 		       mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi);  in cik_cp_compute_resume()
4701 		mqd->queue_state.cp_hqd_pq_rptr_report_addr = wb_gpu_addr & 0xfffffffc;  in cik_cp_compute_resume()
4702 		mqd->queue_state.cp_hqd_pq_rptr_report_addr_hi =  in cik_cp_compute_resume()
4705 		       mqd->queue_state.cp_hqd_pq_rptr_report_addr);  in cik_cp_compute_resume()
4707 		       mqd->queue_state.cp_hqd_pq_rptr_report_addr_hi);  in cik_cp_compute_resume()
4711 			mqd->queue_state.cp_hqd_pq_doorbell_control =  in cik_cp_compute_resume()
4713 			mqd->queue_state.cp_hqd_pq_doorbell_control &= ~DOORBELL_OFFSET_MASK;  in cik_cp_compute_resume()
4714 			mqd->queue_state.cp_hqd_pq_doorbell_control |=  in cik_cp_compute_resume()
4716 			mqd->queue_state.cp_hqd_pq_doorbell_control |= DOORBELL_EN;  in cik_cp_compute_resume()
4717 			mqd->queue_state.cp_hqd_pq_doorbell_control &=  in cik_cp_compute_resume()
4721 			mqd->queue_state.cp_hqd_pq_doorbell_control = 0;  in cik_cp_compute_resume()
4724 		       mqd->queue_state.cp_hqd_pq_doorbell_control);  in cik_cp_compute_resume()
4728 		mqd->queue_state.cp_hqd_pq_wptr = rdev->ring[idx].wptr;  in cik_cp_compute_resume()
4729 		WREG32(CP_HQD_PQ_WPTR, mqd->queue_state.cp_hqd_pq_wptr);  in cik_cp_compute_resume()
4730 		mqd->queue_state.cp_hqd_pq_rptr = RREG32(CP_HQD_PQ_RPTR);  in cik_cp_compute_resume()
4733 		mqd->queue_state.cp_hqd_vmid = 0;  in cik_cp_compute_resume()
4734 		WREG32(CP_HQD_VMID, mqd->queue_state.cp_hqd_vmid);  in cik_cp_compute_resume()
4737 		mqd->queue_state.cp_hqd_active = 1;  in cik_cp_compute_resume()
4738 		WREG32(CP_HQD_ACTIVE, mqd->queue_state.cp_hqd_active);  in cik_cp_compute_resume()