Lines Matching refs:dsi_dcs_write_seq
165 #define dsi_dcs_write_seq(dsi, cmd, seq...) do { \ macro
183 dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83); in xbd599_init_sequence()
185 dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, in xbd599_init_sequence()
197 dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, in xbd599_init_sequence()
204 dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, in xbd599_init_sequence()
215 dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, in xbd599_init_sequence()
227 dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); in xbd599_init_sequence()
233 dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); in xbd599_init_sequence()
236 dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); in xbd599_init_sequence()
239 dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, in xbd599_init_sequence()
249 dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, in xbd599_init_sequence()
270 dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00); in xbd599_init_sequence()
272 dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, in xbd599_init_sequence()
290 dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, in xbd599_init_sequence()
295 dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, in xbd599_init_sequence()
300 dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); in xbd599_init_sequence()
303 dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, in xbd599_init_sequence()
314 dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, in xbd599_init_sequence()
325 dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, in xbd599_init_sequence()