Lines Matching refs:dsi_write_reg

115 	dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, end))
435 static inline void dsi_write_reg(struct dsi_data *dsi, in dsi_write_reg() function
795 dsi_write_reg(dsi, DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK); in omap_dsi_irq_handler()
807 dsi_write_reg(dsi, DSI_VC_IRQSTATUS(i), vcstatus[i]); in omap_dsi_irq_handler()
815 dsi_write_reg(dsi, DSI_COMPLEXIO_IRQ_STATUS, ciostatus); in omap_dsi_irq_handler()
869 dsi_write_reg(dsi, status_reg, (mask ^ old_mask) & mask); in _omap_dsi_configure_irqs()
870 dsi_write_reg(dsi, enable_reg, mask); in _omap_dsi_configure_irqs()
1723 dsi_write_reg(dsi, DSI_COMPLEXIO_CFG1, r); in dsi_set_lane_config()
1800 dsi_write_reg(dsi, DSI_DSIPHY_CFG0, r); in dsi_cio_timings()
1813 dsi_write_reg(dsi, DSI_DSIPHY_CFG1, r); in dsi_cio_timings()
1817 dsi_write_reg(dsi, DSI_DSIPHY_CFG2, r); in dsi_cio_timings()
2042 dsi_write_reg(dsi, DSI_TIMING1, l); in dsi_cio_init()
2168 dsi_write_reg(dsi, DSI_TX_FIFO_VC_SIZE, r); in dsi_config_tx_fifo()
2200 dsi_write_reg(dsi, DSI_RX_FIFO_VC_SIZE, r); in dsi_config_rx_fifo()
2209 dsi_write_reg(dsi, DSI_TIMING1, r); in dsi_force_tx_stop_mode_io()
2382 dsi_write_reg(dsi, DSI_VC_CTRL(channel), r); in dsi_vc_initial_config()
2602 dsi_write_reg(dsi, DSI_VC_LONG_PACKET_HEADER(channel), val); in dsi_vc_write_long_header()
2615 dsi_write_reg(dsi, DSI_VC_LONG_PACKET_PAYLOAD(channel), val); in dsi_vc_write_long_payload()
2705 dsi_write_reg(dsi, DSI_VC_SHORT_PACKET_HEADER(channel), r); in dsi_vc_send_short()
3146 dsi_write_reg(dsi, DSI_TIMING2, r); in dsi_set_lp_rx_timeout()
3173 dsi_write_reg(dsi, DSI_TIMING1, r); in dsi_set_ta_timeout()
3200 dsi_write_reg(dsi, DSI_TIMING1, r); in dsi_set_stop_state_counter()
3227 dsi_write_reg(dsi, DSI_TIMING2, r); in dsi_set_hs_tx_timeout()
3279 dsi_write_reg(dsi, DSI_CTRL, r); in dsi_config_vp_sync_events()
3299 dsi_write_reg(dsi, DSI_CTRL, r); in dsi_config_blanking_modes()
3466 dsi_write_reg(dsi, DSI_VM_TIMING4, r); in dsi_config_cmd_mode_interleaving()
3472 dsi_write_reg(dsi, DSI_VM_TIMING5, r); in dsi_config_cmd_mode_interleaving()
3477 dsi_write_reg(dsi, DSI_VM_TIMING6, r); in dsi_config_cmd_mode_interleaving()
3531 dsi_write_reg(dsi, DSI_CTRL, r); in dsi_proto_config()
3592 dsi_write_reg(dsi, DSI_CLK_TIMING, r); in dsi_proto_timings()
3606 dsi_write_reg(dsi, DSI_VM_TIMING7, r); in dsi_proto_timings()
3644 dsi_write_reg(dsi, DSI_VM_TIMING1, r); in dsi_proto_timings()
3651 dsi_write_reg(dsi, DSI_VM_TIMING2, r); in dsi_proto_timings()
3656 dsi_write_reg(dsi, DSI_VM_TIMING3, r); in dsi_proto_timings()
3846 dsi_write_reg(dsi, DSI_VC_TE(channel), l); in dsi_update_screen_dispc()
3855 dsi_write_reg(dsi, DSI_VC_TE(channel), l); in dsi_update_screen_dispc()