371 	struct nv50_clk_hwsq *hwsq = &clk->hwsq;  in nv50_clk_calc()  local
384 	out = clk_init(hwsq, subdev);  in nv50_clk_calc()
388 	clk_wr32(hwsq, fifo, 0x00000001); /* block fifo */  in nv50_clk_calc()
389 	clk_nsec(hwsq, 8000);  in nv50_clk_calc()
390 	clk_setf(hwsq, 0x10, 0x00); /* disable fb */  in nv50_clk_calc()
391 	clk_wait(hwsq, 0x00, 0x01); /* wait for fb disabled */  in nv50_clk_calc()
446 	clk_mask(hwsq, mast, mastm, 0x00000000);  in nv50_clk_calc()
447 	clk_mask(hwsq, divs, divsm, divsv);  in nv50_clk_calc()
448 	clk_mask(hwsq, mast, mastm, mastv);  in nv50_clk_calc()
454 		clk_mask(hwsq, mast, 0x001000b0, 0x00100080);  in nv50_clk_calc()
456 		clk_mask(hwsq, mast, 0x000000b3, 0x00000081);  in nv50_clk_calc()
463 	clk_mask(hwsq, nvpll[0], 0xc03f0100,  in nv50_clk_calc()
465 	clk_mask(hwsq, nvpll[1], 0x0000ffff, (N << 8) | M);  in nv50_clk_calc()
474 		clk_mask(hwsq, spll[0], 0xc03f0100, (P1 << 19) | (P1 << 16));  in nv50_clk_calc()
475 		clk_mask(hwsq, mast, 0x00100033, 0x00000023);  in nv50_clk_calc()
481 		clk_mask(hwsq, spll[0], 0xc03f0100,  in nv50_clk_calc()
483 		clk_mask(hwsq, spll[1], 0x0000ffff, (N << 8) | M);  in nv50_clk_calc()
484 		clk_mask(hwsq, mast, 0x00100033, 0x00000033);  in nv50_clk_calc()
488 	clk_setf(hwsq, 0x10, 0x01); /* enable fb */  in nv50_clk_calc()
489 	clk_wait(hwsq, 0x00, 0x00); /* wait for fb enabled */  in nv50_clk_calc()
490 	clk_wr32(hwsq, fifo, 0x00000000); /* un-block fifo */  in nv50_clk_calc()
498 	return clk_exec(&clk->hwsq, true);  in nv50_clk_prog()
505 	clk_exec(&clk->hwsq, false);  in nv50_clk_tidy()
522 	clk->hwsq.r_fifo = hwsq_reg(0x002504);  in nv50_clk_new_()
523 	clk->hwsq.r_spll[0] = hwsq_reg(0x004020);  in nv50_clk_new_()
524 	clk->hwsq.r_spll[1] = hwsq_reg(0x004024);  in nv50_clk_new_()
525 	clk->hwsq.r_nvpll[0] = hwsq_reg(0x004028);  in nv50_clk_new_()
526 	clk->hwsq.r_nvpll[1] = hwsq_reg(0x00402c);  in nv50_clk_new_()
531 		clk->hwsq.r_divs = hwsq_reg(0x004800);  in nv50_clk_new_()
534 		clk->hwsq.r_divs = hwsq_reg(0x004700);  in nv50_clk_new_()
537 	clk->hwsq.r_mast = hwsq_reg(0x00c040);  in nv50_clk_new_()