33 gp100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc)  in gp100_gr_zbc_clear_color()  argument
36 	const int znum =  zbc - 1;  in gp100_gr_zbc_clear_color()
39 	if (gr->zbc_color[zbc].format) {  in gp100_gr_zbc_clear_color()
40 		nvkm_wr32(device, 0x418010 + zoff, gr->zbc_color[zbc].ds[0]);  in gp100_gr_zbc_clear_color()
41 		nvkm_wr32(device, 0x41804c + zoff, gr->zbc_color[zbc].ds[1]);  in gp100_gr_zbc_clear_color()
42 		nvkm_wr32(device, 0x418088 + zoff, gr->zbc_color[zbc].ds[2]);  in gp100_gr_zbc_clear_color()
43 		nvkm_wr32(device, 0x4180c4 + zoff, gr->zbc_color[zbc].ds[3]);  in gp100_gr_zbc_clear_color()
48 			  gr->zbc_color[zbc].format << ((znum % 4) * 7));  in gp100_gr_zbc_clear_color()
52 gp100_gr_zbc_clear_depth(struct gf100_gr *gr, int zbc)  in gp100_gr_zbc_clear_depth()  argument
55 	const int znum =  zbc - 1;  in gp100_gr_zbc_clear_depth()
58 	if (gr->zbc_depth[zbc].format)  in gp100_gr_zbc_clear_depth()
59 		nvkm_wr32(device, 0x418110 + zoff, gr->zbc_depth[zbc].ds);  in gp100_gr_zbc_clear_depth()
62 			  gr->zbc_depth[zbc].format << ((znum % 4) * 7));  in gp100_gr_zbc_clear_depth()
128 	.zbc = &gp100_gr_zbc,