Lines Matching +full:0 +full:x04

35 	{ 0x405800,   1, 0x04, 0x0f8000bf },
36 { 0x405830, 1, 0x04, 0x02180324 },
37 { 0x405834, 1, 0x04, 0x08000000 },
38 { 0x405838, 1, 0x04, 0x00000000 },
39 { 0x405854, 1, 0x04, 0x00000000 },
40 { 0x405870, 4, 0x04, 0x00000001 },
41 { 0x405a00, 2, 0x04, 0x00000000 },
42 { 0x405a18, 1, 0x04, 0x00000000 },
48 { 0x406020, 1, 0x04, 0x000103c1 },
49 { 0x406028, 4, 0x04, 0x00000001 },
50 { 0x4064a8, 1, 0x04, 0x00000000 },
51 { 0x4064ac, 1, 0x04, 0x00003fff },
52 { 0x4064b4, 3, 0x04, 0x00000000 },
53 { 0x4064c0, 1, 0x04, 0x801a0078 },
54 { 0x4064c4, 1, 0x04, 0x00c9ffff },
55 { 0x4064d0, 8, 0x04, 0x00000000 },
75 { 0x418800, 1, 0x04, 0x7006860a },
76 { 0x418808, 3, 0x04, 0x00000000 },
77 { 0x418828, 1, 0x04, 0x00008442 },
78 { 0x418830, 1, 0x04, 0x10000001 },
79 { 0x4188d8, 1, 0x04, 0x00000008 },
80 { 0x4188e0, 1, 0x04, 0x01000000 },
81 { 0x4188e8, 5, 0x04, 0x00000000 },
82 { 0x4188fc, 1, 0x04, 0x20100018 },
106 { 0x419848, 1, 0x04, 0x00000000 },
107 { 0x419864, 1, 0x04, 0x00000129 },
108 { 0x419888, 1, 0x04, 0x00000000 },
114 { 0x419a00, 1, 0x04, 0x000001f0 },
115 { 0x419a04, 1, 0x04, 0x00000001 },
116 { 0x419a08, 1, 0x04, 0x00000023 },
117 { 0x419a0c, 1, 0x04, 0x00020000 },
118 { 0x419a10, 1, 0x04, 0x00000000 },
119 { 0x419a14, 1, 0x04, 0x00000200 },
120 { 0x419a1c, 1, 0x04, 0x00008000 },
121 { 0x419a20, 1, 0x04, 0x00000800 },
122 { 0x419ac4, 1, 0x04, 0x0017f440 },
128 { 0x419c00, 1, 0x04, 0x0000000a },
129 { 0x419c04, 1, 0x04, 0x00000006 },
130 { 0x419c08, 1, 0x04, 0x00000002 },
131 { 0x419c20, 1, 0x04, 0x00000000 },
132 { 0x419c24, 1, 0x04, 0x00084210 },
133 { 0x419c28, 1, 0x04, 0x3efbefbe },
149 { 0x41be24, 1, 0x04, 0x00000002 },
155 { 0x41bec0, 1, 0x04, 0x12180000 },
156 { 0x41bec4, 1, 0x04, 0x00003fff },
157 { 0x41bee4, 1, 0x04, 0x03240218 },
163 { 0x41bf00, 1, 0x04, 0x0a418820 },
164 { 0x41bf04, 1, 0x04, 0x062080e6 },
165 { 0x41bf08, 1, 0x04, 0x020398a4 },
166 { 0x41bf0c, 1, 0x04, 0x0e629062 },
167 { 0x41bf10, 1, 0x04, 0x0a418820 },
168 { 0x41bf14, 1, 0x04, 0x000000e6 },
169 { 0x41bfd0, 1, 0x04, 0x00900103 },
170 { 0x41bfe0, 1, 0x04, 0x00400001 },
171 { 0x41bfe4, 1, 0x04, 0x00000000 },
193 for (i = 0; i < 8; i++) in gf117_grctx_generate_dist_skip_table()
194 nvkm_wr32(device, 0x4064d0 + (i * 0x04), 0x00000000); in gf117_grctx_generate_dist_skip_table()
206 for (i = 0; i < 32; i++) in gf117_grctx_generate_rop_mapping()
207 data[i / 6] |= (gr->tile[i] & 0x07) << ((i % 6) * 5); in gf117_grctx_generate_rop_mapping()
210 shift = 0; in gf117_grctx_generate_rop_mapping()
217 data2[0] = (ntpcv << 16); in gf117_grctx_generate_rop_mapping()
218 data2[0] |= (shift << 21); in gf117_grctx_generate_rop_mapping()
219 data2[0] |= (((1 << (0 + 5)) % ntpcv) << 24); in gf117_grctx_generate_rop_mapping()
224 nvkm_wr32(device, 0x418bb8, (gr->tpc_total << 8) | in gf117_grctx_generate_rop_mapping()
226 for (i = 0; i < 6; i++) in gf117_grctx_generate_rop_mapping()
227 nvkm_wr32(device, 0x418b08 + (i * 4), data[i]); in gf117_grctx_generate_rop_mapping()
230 nvkm_wr32(device, 0x41bfd0, (gr->tpc_total << 8) | in gf117_grctx_generate_rop_mapping()
231 gr->screen_tile_row_offset | data2[0]); in gf117_grctx_generate_rop_mapping()
232 nvkm_wr32(device, 0x41bfe4, data2[1]); in gf117_grctx_generate_rop_mapping()
233 for (i = 0; i < 6; i++) in gf117_grctx_generate_rop_mapping()
234 nvkm_wr32(device, 0x41bf00 + (i * 4), data[i]); in gf117_grctx_generate_rop_mapping()
237 nvkm_wr32(device, 0x4078bc, (gr->tpc_total << 8) | in gf117_grctx_generate_rop_mapping()
239 for (i = 0; i < 6; i++) in gf117_grctx_generate_rop_mapping()
240 nvkm_wr32(device, 0x40780c + (i * 4), data[i]); in gf117_grctx_generate_rop_mapping()
250 const u32 size = 0x20 * (grctx->attrib_nr_max + grctx->alpha_nr_max); in gf117_grctx_generate_attrib()
254 const int max_batches = 0xffff; in gf117_grctx_generate_attrib()
255 u32 bo = 0; in gf117_grctx_generate_attrib()
259 mmio_refn(info, 0x418810, 0x80000000, s, b); in gf117_grctx_generate_attrib()
260 mmio_refn(info, 0x419848, 0x10000000, s, b); in gf117_grctx_generate_attrib()
261 mmio_wr32(info, 0x405830, (beta << 16) | alpha); in gf117_grctx_generate_attrib()
262 mmio_wr32(info, 0x4064c4, ((alpha / 4) << 16) | max_batches); in gf117_grctx_generate_attrib()
264 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf117_grctx_generate_attrib()
265 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) { in gf117_grctx_generate_attrib()
269 const u32 o = PPC_UNIT(gpc, ppc, 0); in gf117_grctx_generate_attrib()
272 mmio_skip(info, o + 0xc0, (t << 28) | (b << 16) | ++bo); in gf117_grctx_generate_attrib()
273 mmio_wr32(info, o + 0xc0, (t << 28) | (b << 16) | --bo); in gf117_grctx_generate_attrib()
275 mmio_wr32(info, o + 0xe4, (a << 16) | ao); in gf117_grctx_generate_attrib()
294 .bundle_size = 0x1800,
296 .pagepool_size = 0x8000,
298 .attrib_nr_max = 0x324,
299 .attrib_nr = 0x218,
300 .alpha_nr_max = 0x7ff,
301 .alpha_nr = 0x324,