Lines Matching +full:0 +full:a
4 * Permission is hereby granted, free of charge, to any person obtaining a
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
27 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_4 0x00000004
28 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_4_DONE 0:0
29 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_4_DONE_FALSE 0x00000000
30 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_4_DONE_TRUE 0x00000001
31 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20 0x00000014
32 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS18 0:0
33 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS18_FALSE 0x00000000
34 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS18_TRUE 0x00000001
36 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS24_FALSE 0x00000000
37 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS24_TRUE 0x00000001
39 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS18_FALSE 0x00000000
40 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS18_TRUE 0x00000001
42 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS24_FALSE 0x00000000
43 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS24_TRUE 0x00000001
46 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_A_FALSE 0x00000000
47 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_A_TRUE 0x00000001
49 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_B_FALSE 0x00000000
50 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_B_TRUE 0x00000001
53 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_TMDS_FALSE 0x00000000
54 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_TMDS_TRUE 0x00000001
60 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_A_FALSE 0x00000000
61 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_A_TRUE 0x00000001
63 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_B_FALSE 0x00000000
64 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_B_TRUE 0x00000001
66 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_INTERLACE_FALSE 0x00000000
67 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_INTERLACE_TRUE 0x00000001
72 #define NV907D_DAC_SET_CONTROL(a) (0x00000180 + (a)*0… argument
73 #define NV907D_DAC_SET_CONTROL_OWNER_MASK 3:0
74 #define NV907D_DAC_SET_CONTROL_OWNER_MASK_NONE (0x00000000)
75 #define NV907D_DAC_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001)
76 #define NV907D_DAC_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002)
77 #define NV907D_DAC_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004)
78 #define NV907D_DAC_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008)
80 #define NV907D_DAC_SET_CONTROL_PROTOCOL_RGB_CRT (0x00000000)
81 #define NV907D_DAC_SET_CONTROL_PROTOCOL_YUV_CRT (0x00000013)
83 #define NV907D_SOR_SET_CONTROL(a) (0x00000200 + (a)*0… argument
84 #define NV907D_SOR_SET_CONTROL_OWNER_MASK 3:0
85 #define NV907D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000)
86 #define NV907D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001)
87 #define NV907D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002)
88 #define NV907D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004)
89 #define NV907D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008)
91 #define NV907D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000)
92 #define NV907D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001)
93 #define NV907D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002)
94 #define NV907D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005)
95 #define NV907D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008)
96 #define NV907D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009)
97 #define NV907D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F)
99 #define NV907D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000)
100 #define NV907D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001)
102 #define NV907D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000)
103 #define NV907D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001)
104 #define NV907D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002)
106 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00000404 + (a)*0… argument
107 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0
108 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000)
109 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001)
110 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002)
112 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000)
113 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001)
115 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000)
116 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001)
118 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_DEFAULT (0x00000000)
119 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000001)
120 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000002)
121 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000003)
122 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000004)
123 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000005)
124 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000006)
125 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000007)
126 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000008)
127 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000009)
128 #define NV907D_HEAD_SET_CONTROL(a) (0x00000408 + (a)*0… argument
129 #define NV907D_HEAD_SET_CONTROL_STRUCTURE 0:0
130 #define NV907D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000)
131 #define NV907D_HEAD_SET_CONTROL_STRUCTURE_INTERLACED (0x00000001)
132 #define NV907D_HEAD_SET_OVERSCAN_COLOR(a) (0x00000410 + (a)*0… argument
133 #define NV907D_HEAD_SET_OVERSCAN_COLOR_RED 9:0
136 #define NV907D_HEAD_SET_RASTER_SIZE(a) (0x00000414 + (a)*0… argument
137 #define NV907D_HEAD_SET_RASTER_SIZE_WIDTH 14:0
139 #define NV907D_HEAD_SET_RASTER_SYNC_END(a) (0x00000418 + (a)*0… argument
140 #define NV907D_HEAD_SET_RASTER_SYNC_END_X 14:0
142 #define NV907D_HEAD_SET_RASTER_BLANK_END(a) (0x0000041C + (a)*0… argument
143 #define NV907D_HEAD_SET_RASTER_BLANK_END_X 14:0
145 #define NV907D_HEAD_SET_RASTER_BLANK_START(a) (0x00000420 + (a)*0… argument
146 #define NV907D_HEAD_SET_RASTER_BLANK_START_X 14:0
148 #define NV907D_HEAD_SET_RASTER_VERT_BLANK2(a) (0x00000424 + (a)*0… argument
149 #define NV907D_HEAD_SET_RASTER_VERT_BLANK2_YSTART 14:0
151 #define NV907D_HEAD_SET_DEFAULT_BASE_COLOR(a) (0x0000042C + (a)*0… argument
152 #define NV907D_HEAD_SET_DEFAULT_BASE_COLOR_RED 9:0
155 #define NV907D_HEAD_SET_CRC_CONTROL(a) (0x00000430 + (a)*0… argument
156 #define NV907D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 1:0
157 #define NV907D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000000)
158 #define NV907D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_BASE (0x00000001)
159 #define NV907D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_OVERLAY (0x00000002)
161 #define NV907D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000)
162 #define NV907D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001)
164 #define NV907D_HEAD_SET_CRC_CONTROL_TIMESTAMP_MODE_FALSE (0x00000000)
165 #define NV907D_HEAD_SET_CRC_CONTROL_TIMESTAMP_MODE_TRUE (0x00000001)
167 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC(i) (0x00000FF0 +(i))
169 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC0 (0x00000FF0)
170 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC1 (0x00000FF1)
171 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC2 (0x00000FF2)
172 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC3 (0x00000FF3)
173 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG(i) (0x00000FF8 +(i))
175 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG0 (0x00000FF8)
176 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG1 (0x00000FF9)
177 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG2 (0x00000FFA)
178 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG3 (0x00000FFB)
179 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR(i) (0x00000F0F +(i)*16)
181 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR0 (0x00000F0F)
182 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR1 (0x00000F1F)
183 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR2 (0x00000F2F)
184 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR3 (0x00000F3F)
185 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR4 (0x00000F4F)
186 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR5 (0x00000F5F)
187 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR6 (0x00000F6F)
188 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR7 (0x00000F7F)
189 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF(i) (0x00000F8F +(i)*16)
191 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF0 (0x00000F8F)
192 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF1 (0x00000F9F)
193 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF2 (0x00000FAF)
194 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF3 (0x00000FBF)
195 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR(i) (0x000000FF +(i)*25…
197 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR0 (0x000000FF)
198 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR1 (0x000001FF)
199 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR2 (0x000002FF)
200 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR3 (0x000003FF)
201 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR4 (0x000004FF)
202 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR5 (0x000005FF)
203 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR6 (0x000006FF)
204 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR7 (0x000007FF)
205 #define NV907D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_NONE (0x00000FFF)
207 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC(i) (0x00000FF0 +(i))
209 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC0 (0x00000FF0)
210 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC1 (0x00000FF1)
211 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC2 (0x00000FF2)
212 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC3 (0x00000FF3)
213 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG(i) (0x00000FF8 +(i))
215 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG0 (0x00000FF8)
216 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG1 (0x00000FF9)
217 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG2 (0x00000FFA)
218 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG3 (0x00000FFB)
219 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR(i) (0x00000F0F +(i)*16)
221 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR0 (0x00000F0F)
222 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR1 (0x00000F1F)
223 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR2 (0x00000F2F)
224 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR3 (0x00000F3F)
225 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR4 (0x00000F4F)
226 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR5 (0x00000F5F)
227 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR6 (0x00000F6F)
228 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR7 (0x00000F7F)
229 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF(i) (0x00000F8F +(i)*16)
231 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF0 (0x00000F8F)
232 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF1 (0x00000F9F)
233 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF2 (0x00000FAF)
234 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF3 (0x00000FBF)
235 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR(i) (0x000000FF +(i)*25…
237 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR0 (0x000000FF)
238 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR1 (0x000001FF)
239 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR2 (0x000002FF)
240 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR3 (0x000003FF)
241 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR4 (0x000004FF)
242 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR5 (0x000005FF)
243 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR6 (0x000006FF)
244 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR7 (0x000007FF)
245 #define NV907D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_NONE (0x00000FFF)
247 #define NV907D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000)
248 #define NV907D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001)
249 #define NV907D_HEAD_SET_CONTEXT_DMA_CRC(a) (0x00000438 + (a)*0… argument
250 #define NV907D_HEAD_SET_CONTEXT_DMA_CRC_HANDLE 31:0
251 #define NV907D_HEAD_SET_OUTPUT_LUT_LO(a) (0x00000448 + (a)*0… argument
253 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_ENABLE_DISABLE (0x00000000)
254 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_ENABLE_ENABLE (0x00000001)
256 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_LORES (0x00000000)
257 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_HIRES (0x00000001)
258 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_INDEX_1025_UNITY_RANGE (0x00000003)
259 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_1025_UNITY_RANGE (0x00000004)
260 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_1025_XRBIAS_RANGE (0x00000005)
261 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_1025_XVYCC_RANGE (0x00000006)
262 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_257_UNITY_RANGE (0x00000007)
263 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_257_LEGACY_RANGE (0x00000008)
265 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_NEVER_YIELD_TO_BASE_DISABLE (0x00000000)
266 #define NV907D_HEAD_SET_OUTPUT_LUT_LO_NEVER_YIELD_TO_BASE_ENABLE (0x00000001)
267 #define NV907D_HEAD_SET_OUTPUT_LUT_HI(a) (0x0000044C + (a)*0… argument
268 #define NV907D_HEAD_SET_OUTPUT_LUT_HI_ORIGIN 31:0
269 #define NV907D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x00000450 + (a)*0… argument
270 #define NV907D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0
272 #define NV907D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000)
273 #define NV907D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001)
274 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x00000454 + (a)*0… argument
276 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_MODE_CLK_25 (0x00000000)
277 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_MODE_CLK_28 (0x00000001)
278 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_MODE_CLK_CUSTOM (0x00000002)
280 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000)
281 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001)
283 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_ENABLE_HOPPING_FALSE (0x00000000)
284 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_ENABLE_HOPPING_TRUE (0x00000001)
286 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000)
287 #define NV907D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001)
288 #define NV907D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00000458 + (a)*0… argument
289 #define NV907D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0
291 #define NV907D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000)
292 #define NV907D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001)
293 #define NV907D_HEAD_SET_CONTEXT_DMA_LUT(a) (0x0000045C + (a)*0… argument
294 #define NV907D_HEAD_SET_CONTEXT_DMA_LUT_HANDLE 31:0
295 #define NV907D_HEAD_SET_OFFSET(a) (0x00000460 + (a)*0… argument
296 #define NV907D_HEAD_SET_OFFSET_ORIGIN 31:0
297 #define NV907D_HEAD_SET_SIZE(a) (0x00000468 + (a)*0… argument
298 #define NV907D_HEAD_SET_SIZE_WIDTH 15:0
300 #define NV907D_HEAD_SET_STORAGE(a) (0x0000046C + (a)*0… argument
301 #define NV907D_HEAD_SET_STORAGE_BLOCK_HEIGHT 3:0
302 #define NV907D_HEAD_SET_STORAGE_BLOCK_HEIGHT_ONE_GOB (0x00000000)
303 #define NV907D_HEAD_SET_STORAGE_BLOCK_HEIGHT_TWO_GOBS (0x00000001)
304 #define NV907D_HEAD_SET_STORAGE_BLOCK_HEIGHT_FOUR_GOBS (0x00000002)
305 #define NV907D_HEAD_SET_STORAGE_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003)
306 #define NV907D_HEAD_SET_STORAGE_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004)
307 #define NV907D_HEAD_SET_STORAGE_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005)
310 #define NV907D_HEAD_SET_STORAGE_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000)
311 #define NV907D_HEAD_SET_STORAGE_MEMORY_LAYOUT_PITCH (0x00000001)
312 #define NV907D_HEAD_SET_PARAMS(a) (0x00000470 + (a)*0… argument
314 #define NV907D_HEAD_SET_PARAMS_FORMAT_I8 (0x0000001E)
315 #define NV907D_HEAD_SET_PARAMS_FORMAT_VOID16 (0x0000001F)
316 #define NV907D_HEAD_SET_PARAMS_FORMAT_VOID32 (0x0000002E)
317 #define NV907D_HEAD_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA)
318 #define NV907D_HEAD_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF)
319 #define NV907D_HEAD_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1)
320 #define NV907D_HEAD_SET_PARAMS_FORMAT_X2BL10GL10RL10_XRBIAS (0x00000022)
321 #define NV907D_HEAD_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5)
322 #define NV907D_HEAD_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8)
323 #define NV907D_HEAD_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9)
324 #define NV907D_HEAD_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6)
325 #define NV907D_HEAD_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023)
326 #define NV907D_HEAD_SET_PARAMS_SUPER_SAMPLE 1:0
327 #define NV907D_HEAD_SET_PARAMS_SUPER_SAMPLE_X1_AA (0x00000000)
328 #define NV907D_HEAD_SET_PARAMS_SUPER_SAMPLE_X4_AA (0x00000002)
330 #define NV907D_HEAD_SET_PARAMS_GAMMA_LINEAR (0x00000000)
331 #define NV907D_HEAD_SET_PARAMS_GAMMA_SRGB (0x00000001)
332 #define NV907D_HEAD_SET_CONTEXT_DMAS_ISO(a) (0x00000474 + (a)*0… argument
333 #define NV907D_HEAD_SET_CONTEXT_DMAS_ISO_HANDLE 31:0
334 #define NV907D_HEAD_SET_CONTROL_CURSOR(a) (0x00000480 + (a)*0… argument
336 #define NV907D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000)
337 #define NV907D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001)
339 #define NV907D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x00000000)
340 #define NV907D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x00000001)
342 #define NV907D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000)
343 #define NV907D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001)
347 #define NV907D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_ALPHA_BLEND (0x00000000)
348 #define NV907D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_PREMULT_ALPHA_BLEND (0x00000001)
349 #define NV907D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_XOR (0x00000002)
350 #define NV907D_HEAD_SET_OFFSET_CURSOR(a) (0x00000484 + (a)*0… argument
351 #define NV907D_HEAD_SET_OFFSET_CURSOR_ORIGIN 31:0
352 #define NV907D_HEAD_SET_CONTEXT_DMA_CURSOR(a) (0x0000048C + (a)*0… argument
353 #define NV907D_HEAD_SET_CONTEXT_DMA_CURSOR_HANDLE 31:0
354 #define NV907D_HEAD_SET_DITHER_CONTROL(a) (0x00000490 + (a)*0… argument
355 #define NV907D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0
356 #define NV907D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000)
357 #define NV907D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001)
359 #define NV907D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_6_BITS (0x00000000)
360 #define NV907D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_8_BITS (0x00000001)
361 #define NV907D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_10_BITS (0x00000002)
363 #define NV907D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000)
364 #define NV907D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001)
365 #define NV907D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002)
366 #define NV907D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003)
367 #define NV907D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004)
369 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00000494 + (a)*0… argument
370 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0
371 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_1 (0x00000000)
372 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001)
373 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_3 (0x00000002)
374 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_3_ADAPTIVE (0x00000003)
375 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004)
377 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_1 (0x00000000)
378 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001)
379 #define NV907D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_8 (0x00000002)
382 #define NV907D_HEAD_SET_PROCAMP(a) (0x00000498 + (a)*0… argument
383 #define NV907D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0
384 #define NV907D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000)
385 #define NV907D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001)
386 #define NV907D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002)
388 #define NV907D_HEAD_SET_PROCAMP_CHROMA_LPF_AUTO (0x00000000)
389 #define NV907D_HEAD_SET_PROCAMP_CHROMA_LPF_ON (0x00000001)
393 #define NV907D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000)
394 #define NV907D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001)
396 #define NV907D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_DISABLE (0x00000000)
397 #define NV907D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_ENABLE (0x00000001)
398 #define NV907D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x000004B0 + (a)*0… argument
399 #define NV907D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0
401 #define NV907D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x000004B8 + (a)*0… argument
402 #define NV907D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0
404 #define NV907D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x000004C0 + (a)*0… argument
405 #define NV907D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0
407 #define NV907D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN(a) (0x000004C4 + (a)*0… argument
408 #define NV907D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN_WIDTH 14:0
410 #define NV907D_HEAD_SET_VIEWPORT_SIZE_OUT_MAX(a) (0x000004C8 + (a)*0… argument
411 #define NV907D_HEAD_SET_VIEWPORT_SIZE_OUT_MAX_WIDTH 14:0
413 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(a) (0x000004D0 + (a)*0… argument
414 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE 0:0
415 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE_FALSE (0x00000000)
416 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE_TRUE (0x00000001)
418 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_8 (0x00000000)
419 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_16 (0x00000001)
420 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_32 (0x00000003)
421 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_64 (0x00000005)
423 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE_X1_AA (0x00000000)
424 #define NV907D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE_X4_AA (0x00000002)
425 #define NV907D_HEAD_SET_OVERLAY_USAGE_BOUNDS(a) (0x000004D4 + (a)*0… argument
426 #define NV907D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE 0:0
427 #define NV907D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE_FALSE (0x00000000)
428 #define NV907D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE_TRUE (0x00000001)
430 #define NV907D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_16 (0x00000001)
431 #define NV907D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_32 (0x00000003)
432 #define NV907D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_64 (0x00000005)