833 	struct drm_framebuffer *drm_fb;  in nv04_crtc_do_mode_set_base()  local
848 		drm_fb = passed_fb;  in nv04_crtc_do_mode_set_base()
850 		drm_fb = crtc->primary->fb;  in nv04_crtc_do_mode_set_base()
853 	nvbo = nouveau_gem_object(drm_fb->obj[0]);  in nv04_crtc_do_mode_set_base()
856 	if (nv_crtc->lut.depth != drm_fb->format->depth) {  in nv04_crtc_do_mode_set_base()
857 		nv_crtc->lut.depth = drm_fb->format->depth;  in nv04_crtc_do_mode_set_base()
863 	regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] |= (drm_fb->format->depth + 1) / 8;  in nv04_crtc_do_mode_set_base()
865 	if (drm_fb->format->depth == 16)  in nv04_crtc_do_mode_set_base()
871 	regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitches[0] >> 3;  in nv04_crtc_do_mode_set_base()
873 		XLATE(drm_fb->pitches[0] >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);  in nv04_crtc_do_mode_set_base()
875 		XLATE(drm_fb->pitches[0] / 8, 11, NV_CIO_CRE_42_OFFSET_11);  in nv04_crtc_do_mode_set_base()
882 	regp->fb_start += (y * drm_fb->pitches[0]) + (x * drm_fb->format->cpp[0]);  in nv04_crtc_do_mode_set_base()
886 	nouveau_calc_arb(dev, crtc->mode.clock, drm_fb->format->cpp[0] * 8,  in nv04_crtc_do_mode_set_base()