Lines Matching refs:edp_write
390 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, EDP_INTR_MASK1); in edp_ctrl_irq_enable()
391 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_2, EDP_INTR_MASK2); in edp_ctrl_irq_enable()
393 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, 0x0); in edp_ctrl_irq_enable()
394 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_2, 0x0); in edp_ctrl_irq_enable()
456 edp_write(ctrl->base + REG_EDP_CONFIGURATION_CTRL, data); in edp_config_ctrl()
461 edp_write(ctrl->base + REG_EDP_STATE_CTRL, state); in edp_state_ctrl()
842 edp_write(ctrl->base + REG_EDP_MISC1_MISC0, data); in edp_clock_synchrous()
859 edp_write(ctrl->base + REG_EDP_SOFTWARE_MVID, m * m_multi); in edp_sw_mvid_nvid()
860 edp_write(ctrl->base + REG_EDP_SOFTWARE_NVID, n * n_multi); in edp_sw_mvid_nvid()
869 edp_write(ctrl->base + REG_EDP_MAINLINK_CTRL, EDP_MAINLINK_CTRL_RESET); in edp_mainlink_ctrl()
877 edp_write(ctrl->base + REG_EDP_MAINLINK_CTRL, data); in edp_mainlink_ctrl()
1084 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, ack); in msm_edp_ctrl_irq()
1089 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_2, ack); in msm_edp_ctrl_irq()
1312 edp_write(ctrl->base + REG_EDP_TOTAL_HOR_VER, in msm_edp_ctrl_timing_cfg()
1318 edp_write(ctrl->base + REG_EDP_START_HOR_VER_FROM_SYNC, in msm_edp_ctrl_timing_cfg()
1330 edp_write(ctrl->base + REG_EDP_HSYNC_VSYNC_WIDTH_POLARITY, data); in msm_edp_ctrl_timing_cfg()
1332 edp_write(ctrl->base + REG_EDP_ACTIVE_HOR_VER, in msm_edp_ctrl_timing_cfg()